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AM335x Initial IO state control at power up

Mukul Bhatnagar
Guru* 78475 points

 

 

We need a single, specific hardware question addressed very quickly from an AM335x expert at TI.

The question is:

 

QUESTION: Is there a hardware means of setting the initial IO state of a particular pin upon power up?

 

On the Wi-Fi module that we  are developing, we connected an I/O from the AM335x to

the RESETn of another chip (USB Hub device.)  We were expecting the IO from the A8 to

come up as an input, but it appears to come up as an output in a low state. This holds the

USB chip in reset.

 

We are using the AM3352BZCE30.

The output is pin U14 / GPIO1.6 / GPMC_AD6

The output is low upon power up – prior to booting MLO.

We can change it in the LMO, but that is too late.

 

The AM335 TRM states:

25.3.4.3 Data Input (Capture)/Output (Drive)

The output enable register (GPIO_OE) controls the output/input capability for each pin. At reset, all the

GPIO-related pins are configured as input and output capabilities are disabled.

 

I know there are pin muxing registers and a configuration utility for setting default states – but that is in software,

after the boot process has begun. I am talking about the initial power up state.

 

QUESTION:         Is there a hardware means of setting the initial IO state of a particular pin immediately upon power up?

                                If so, how do I make this IO pin an input on power up?

                                If not, why is this pin not set to an input upon power up?

 

I have found the following in a wiki document:

Pin Muxing

Although pin muxing is frequently software configurable, often the initial configuration is dependent on several configuration pins

(e.g. are they high or low when reset is released).

 

This makes me think there may be a hardware configuration that is setting this IO Output/Low.

 

  • 0
    TI__Guru* 78475 points
    Will highlight to Biser and team to help address.
  • 0 in reply to Mukul Bhatnagar
    TI__Guru**** 393215 points

    AM335X I/O pins have a default state when the processor is held in reset and at reset release time. These can be seen in Table 4-1 from the AM335X Datasheet Rev. H (columns "BALL RESET STATE" and "BALL RESET REL. STATE"). There is no way to change these default states.

  • 0 in reply to Biser Gatchev-XID
    TI__Guru*** 125430 points

    Just to be clear, the reset state of the pin in question is "High impedance, with active pull-down resistor".  So from a hardware perspective this is not being DRIVEN low it is being PULLED low.  That said, if they rely on a different state at power-up, they have the ability to use an opposing pullup to override the internal pulldown. That would be "the hardware way" of controlling this behavior.

    One other item to keep in mind would be activity by the ROM code.  So obviously any boot mode that uses the GPMC (i.e. NOR and NAND boot) is going to reconfigure this pin to be GPMC_AD6.

  • 0 in reply to Brad Griffis
    TI__Genius 9575 points
    Unfortunately, there is no set HW option inside of the SoC that can impact default pull values during RESET. This can only be impacted after RESET i.e. when you can program the IO state using the control module registers.

    However, there are 2 options:
    - If possible, use a different pin. Since you state RESETn, one possibility is using the WARMRESETn pin for the connectivity to the USB Hub
    - Override with an external pull resistor to oppose the internal pull. The pull strengths are documented in the data sheet. A reasonable value of pull resistor that can override an internal pull is 1K

    Please let us know if this helps.

    Regards, Siva
  • 0 in reply to sivak
    TI__Prodigy 465 points
    All-

    Thanks for the responses. Feedback from the customer is that this means that the device does not act per the TRM.

    Kelsey
  • 0 in reply to Kelsey Ballance
    TI__Guru*** 125430 points

    Please let us know where our documentation is wrong.  The signal in question, GPMC_AD6, has its mux and pullups/pulldowns controlled by conf_gpmc_ad6:

    If you look at the description of that register you will see that it mentions to see the data manual for the default values:

    Here is a snippet from the corresponding table of the data manual:

    The "reset release mode" is gpio1_6. and the ball release state is 'L', meaning "High-impedance with an active pulldown resistor".

    So as mentioned, if they would like for this signal to default to high, they can override this internal pulldown with an external pullup.  However, "High-impedance with an active pulldown resistor" is the documented and expected behavior of this signal.  Is that what they are observing?