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What TI solution do you recommend to me?

Other Parts Discussed in Thread: AM3359, DP83640

Hi to all, 

I am going to start a project and i need some support from you to select the correct device to use on it. 

The system to manufacture has to be a system where some digital I/O have to be read/write (an amount of 32 more less). These GPIOs have to be monitored by software, and when one of them changes its state, we have to make a timestamp with the time associated to this change of value in GPIOs. So this is the first requirement on my project, possibility of making timestamp of hw events (changes on I/O values). Precission has to be microseconds, so PTP (precision time protocol) has to be supported by the device.

In addition, this information of timestamping, has to be sent to a SCADA system (WINCC OA) for monitoring purposes, and WINCC OA must be able to change the value of the outputs of my circuit. I have been looking for the best solution to communicate to WINCC OA, and to avoid additional protocol implementations (OPC, etc). My idea is to make this communication by TCP/IP. So the next requirement of my project is that the device to use must be able to transmit and receive packets through TCP/IP with this timestamp information. 

If possible, this device should be able to remain this timestamp data after a power loss. I would prefer that the device has an internal memory to remain these data, but no problem if saving of data has to be done by an external memory. 

Other requirements to take into account are 

  • Device must support linear and ring topology. So at least, 2 ethernet ports (internal switch integrated) must be available on the device

I have been studying what device could comply with these requirements and i have seen the AM3359 processor which has the following features:

  • PTP support
  • 2-port integrated switch ( for linear and ring topology).
  • 4 banks of 32 GPIO ( enough for me)
  • Support of TCP/IP communication acquiring a TCP/IP stack. I have this point not too much clear, so if possible confirm me. 

I have also seen other processors that comply with these requirements ( like AM437X), but my question is if we can achieve all the requirements with a "smaller" solution, because the use of an ARM Cortex A8 processor to check i/o values and make timestamping sounds exaggerated.

Could you please tell me if i can achieve comply with the requirements of the project with a solution based on a MCU?? Maybe with other kind of device that at this moment i dont know. 

Hope your answers. 

Thanks by advance for your support.

Regards

  • Hi,

    The AM335X processor family should be sufficient for your requirements, as you have listed them.
  • Hi Biser, 

    Thanks for your answer. Any microcontroller is ready to comply the requirements I told you??

    I have more doubts regarding to the use of AM335X family.

    • Do i have to get a specific license for PTP stack? Or it is included on AM335X processors?
    • Do i have to get an extra license for TCP/IP stack?? I think that yes, but it is better if you can confirm me.
    • Do I have to use specific phyters to work with PTP?? For example DP83640?
    • It is possible to make timestamps of HW events?? for example when a GPIO changes its value??
    • Has AM335X family internal remanent memory to be used to save timestamp data?? Or do I have to connect an external memory to carry out this task?
    • Are there other kind of licenses to be acquired in addition to TCP/IP stack and PTP stack? ( You have to confirm me that a PTP stack license is required)

    Thanks again for your support. 

    kind regards.

  • I can't say about "any microcontroller", this forum covers only the Sitara processor family. On your questions:

    •Do I have to get a specific license for PTP stack? Or it is included on AM335X processors? No.
    •Do I have to get an extra license for TCP/IP stack?? I think that yes, but it is better if you can confirm me. No.
    •Do I have to use specific phyters to work with PTP?? For example DP83640? I will ask about this.
    •It is possible to make timestamps of HW events?? for example when a GPIO changes its value? I will ask about this.
    •Has AM335X family internal permanent memory to be used to save timestamp data?? Or do I have to connect an external memory to carry out this task? External memory is necessary.
    •Are there other kind of licenses to be acquired in addition to TCP/IP stack and PTP stack? ( You have to confirm me that a PTP stack license is required) No.
  • GPIO 0,1,2 have an interrupt request line which can be used as DMA Event (GPIOEVT0,1,2). So you can do a DMA transfer on each rising or falling edge, and store the GPIO value and a value from a hardware timer. So you can implement a real time time stamping on GPIO input state change.

  • Ok, thanks for your answer Wolfgang.

    In addition to the doubt reported in my last mail about the phyters (if they are required or not), in case of they are required, Does it requires programming?? Or the software is already loaded in the phyter and it only requires external connections to AM3359 and PHYs?

    In addition, other requirement in my design is to prepare the device to work in linear and ring topology. I have seen that DLR (device level ring) is supported by AM3359, but i understand that the usage of it, is only possible working with Ethernet IP. So, it is not possible to create a "normal" ring topology (without supervisor) if i don't use Ethernet IP for data transmission??

    Thanks again for your support, and sorry about my ignorance :)
  • Biser Gatchev-XID said:

    •Do I have to use specific phyters to work with PTP?? For example DP83640? 

    Not necessarily. Most Sitara devices provide HW time-stamping (TS) functionality that can support PTP, but the system designer would need to understand all of the requirements of the proposed implementation to characterize suitability of using the internal TS vs external TS such as in the DP83640.


    •It is possible to make timestamps of HW events?? for example when a GPIO changes its value?

    Yes, but this would ultimately need to be under SW control as the device GPIO's do not directly connect to the TS module. For example, an interrupt handler could monitor the GPIO state-change interrupt and push a TS event into the TS FIFO when called. The resolution of the event triggering would depend on several factors, most notably OS overhead, so the granularity of these events could change based on system loading. On the other hand, the 1588v2 TS functionality is completely HW-based and would not depend on or require OS intervention to load TS events based on Rx or Tx 1588 packets.

    For more details, please refer to  AM335x TRM section 14.3.7. Even if you don't plan to use this particular device, with a few very small exceptions, the TS module used in Sitara devices is common to the platform.
     

  • Thanks DK.

    Quite clear answers.

    To complete all my "hardware" doubts at this moment, i only have to confirm if it is possible to use ring topology with AM3359 if i dont plan to use Ethernet IP to communicate with WINCC OA ( i have seen DLR is supported by AM3359 but this kind of topology is only used for Ethernet IP. I would need to create a "normal" ring topology with several similar devices based on AM3359).

    I will study now how to program the device because it is my first time i try to program an ARM processor. Could you please recommend me some starter guide or similar documentation to enter in the thrilling world of ARM programming?

    Thanks for all your time and effort.

    Best regards.
  • Hi Biser,

    I should know if AM3359 supports ring topology. I have seen that DLR is supported, but I understand that I can only use this feature if I work with Ethernet IP, and my idea is to work with TCP/IP communication.

    Could you please answer this question? I can not continue with my design if the device dont support this feature.

    Thanks again for your support.
  • Hi again,

    I would need to know if "normal" ring topology is supported by AM3359.

    I have readen in other forums that the 2 Ethernet ports of AM3359 must be in different subnetworks. Is this right??

    Please, give me an answer because I can not continue studying this element if ring topology is not supported.

    Regards

  • Yes, if the CPSW is configured in Dual EMAC mode this is true. You can check what the CPSW Linux Driver supports here: processors.wiki.ti.com/.../Linux_Core_CPSW_User's_Guide
  • But this only apply to Linux?? If I use a RTOS (SYS/Bios), Can I connect the device in "normal" ring topology??
  • The Industrial SDK supports ring topologies for EtherCat slave, etc. through the PRU_ICCS MACs. EtherCat master is supported on the CPSW EMACs.
  • Could you go into more detail about "normal ring" topology?

    If this is a token ring network based on 802.5 then it is not supported. 

    If you want to hook the devices up in a ring that is possible. To do that the interface is in switch mode, traffic can then flow through both ports to other devices. 

  • Hi Schuyler, 

    Sorry for my late answer. 

    Yes, this is what we want to do. Receive packets in one ETH port, take the information of the packet if required, and pass to the next device by the other ETH port up to close the ring. 

    But according to Byser, configure the switch in "Switch mode" instead of "Dual EMAC mode" is not possible using Linux, is it? Under what kind of O.S could i do this?

    Thanks again for your support and sorry about my ignorance, it is my first project with AM3359

  • no answers to my question??

    To close this post i should need how to configure the switch in "switch mode" and under what OS this could work??

    My idea is to use SYS/BIOS or Starterware to carry out the design. Would it be possible to configure the switch in "switch mode" under these OS??

    Have this configuration (switch mode) some restrictions to work with PTPv2 protocol??

    Thanks.