• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 101 subscribers
  • Views 343 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM335x MCSPI_MODULCTRL reset value

Gunter Schmer
Genius 13637 points

Hi,

the TRM spruh73l.pdf shows in chapter 24.4.1.7 that the reset value of MCSPI_MODULCTRL is 0x00000004.

However table 24-17 shows the reset value as 0x0.

Which one is correct?

Essentially does the MCSPI come out of reset in Slave or Master mode?

Thanks,

--Gunter

  • 0
    TI__Guru*** 125430 points

    Gunter,

    I just tried it on silicon to confirm.  First you need to enable the SPI0 clock through the CM_PER_SPI0_CLKCTRL register:

    devmem2 0x44e0004c w 2

    Then you can read back the SPI0 MCSPI_MODULCTRL register:

    root@am335x-evm:~# devmem2 0x48030128

    /dev/mem opened.

    Memory mapped at address 0xb6f82000.

    Read at address  0x48030128 (0xb6f82128): 0x00000004

    It is a slave coming out of reset.

    Brad