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AM5728 using PCIe ljcb_clk pins as reference clock output

Other Parts Discussed in Thread: AM5728

Hi,

according to the TRM, the ACSPCIE module can be used in TX mode. The ljcb_clk pins are then used as PCIe reference clock output (section 26.4.4.4.3).
If I understand this correctly, the ACSPCIe TX mode can be selected in the register CTRL_CORE_SMA_SW_6 => PCIE_TX_RX_CONTROL.

I'm not sure about how we can activate the TX mode using linux and which additional steps are required to configure internal PCIe clocking.

Do we have to activate TX mode in U-Boot and then configure the clocks using the linux device tree?

Thanks,
Ralf

  • Hi,

    I will ask the software team to look at this.
  • Hi Ralf,

    Your understanding is correct about configuration of the ACSPCIe TX mode. The ACSPCIe TX mode can be selected in the register CTRL_CORE_SMA_SW_6 => PCIE_TX_RX_CONTROL but if it not succeed you should check the whole PCIe configuration.
    Also the ACSPCIe TX mode can be enabled in u-boot.

    BR
    Tsvetolin Shulev

  • Hi. Ralf,
    I am now going throgh problem of the pcie clockout, I used the SDK is am57xx-evm-sdk-src-02.00.01.07.
    I setting the register CTRL_CORE_SMA_SW_6 => PCIE_TX_RX_CONTROL. But it's still can't work. and no signal output to ljcb_clk pins. Can you give me some important advice for this?



    I will be very grateful to you.
    Best Regards
    Qing
  • Hi Qing,

    I included the following lines in U-Boot and this seems to work for me:

    /* Enable PCIe clock output 'ljcb_clk' => CTRL_CORE_SMA_SW_6.PCIE_TX_RX_CONTROL = 1 */
    volatile unsigned int *CTRL_CORE_SMA_SW_6 = (volatile unsigned int *)0x4A003C14;
    *CTRL_CORE_SMA_SW_6 = ((*CTRL_CORE_SMA_SW_6) & ~0x30000) | 0x10000;

    Ralf

  • Hi, Ralf:
    Thanks for your reply, but I also add same action into pcie-phy driver, but it's still no signal output.
    and can you tell me your Ti SDK version?

    Thank you very much!
    Best Regards
    Qing
  • I'm using PROCESSOR-SDK-LINUX-AM57X 03.00.00.04
  • Thank you very much!
  • Hi Ralf,

    I also want to get PCIe Ref Clock output from Am5728 with Linux SDK V.03.02.

    Can I get the PCIe ref clk output by changing the u-boot only as per your suggestion?

    Thanks & Regards

    Srikanta

  • Hi Srikanta,

    the changes I made in U-Boot are working for me. But it seems that the clock output only gets active after some initialization in the Linux kernel.

    Ralf

  • Hi Ralf,

    Thanks a lot for your response.
    For your case it was working by changing the u-boot only.
    But for my case, why should I change Linux Kernel?
    Could you please give some explanation regarding this?

    Would you please tell me the u-boot file name where you have made changes?
    Even if we need to change in Linux kernel, can you specify what needs to be modified and in which file(s) ?

    Thanks & Regards
    Srikanta
  • Hi Srikanta,

    I think you missunderstood my statements.

    A modification of the kernel should not be necessary.
    I just tried to explain that the clock output doesn't become active immediately after executing the added code within U-Boot. It requires additional steps done by the Kernel, I guess something during initialization of the PCIe controller.

    I have implemented the modification in custom U-Boot board code.
    But I think it should be possible to put these lines into board_late_init() in board/ti/am57xx/board.c.

    Please note that the delayed activation of the clock signal may violate reset requirements for connected PCIe devices. It's possible to let the kernel control the PCIe reset signal using a GPIO pin during initialization. But there is also a timing problem in the driver, see

    Ralf

  • Hi Ralf,

    I am very grateful to your explanation.

    If it is known to you then please let me know the modifications in Ti SDK Kernel for PCIe clk output.

    I am eagerly waiting for your reply.

    Best Regards
    Srikanta
  • I think you still don't understand me completely :-)
    The Kernel is already doing the required steps for activating the clock signal, I'm just not sure what exactly they are.
    But I think it's important to understand that the clock gets active relatively late in the boot process, because PCIe devices may require a valid clock signal when their reset signal is released.

    Ralf