Hello all,
I have a custom board AM437x board and had it working on kernel 3.12.10 (tag was ti2013.12.01) because that was what the initial BSP used.
I've recently tried to update to a kernel 4.1.6 (tag ti2015.01) and am now getting the following error:
[ 0.219181] cpuidle: using governor ladder [ 0.239071] cpuidle: using governor menu [ 0.241680] omap_l3_noc 44000000.ocp: L3 debug error: target 13 mod:1 (unclearable) [ 0.241780] ------------[ cut here ]------------ [ 0.241810] WARNING: CPU: 0 PID: 1 at drivers/bus/omap_l3_noc.c:149 l3_interrupt_handler+0x344/0x38c() [ 0.241824] 44000000.ocp:L3 Custom Error: MASTER M2 (64-bit) TARGET L4_WKUP (Read): Data Access in User mode during Functional access [ 0.241832] Modules linked in: [ 0.241851] CPU: 0 PID: 1 Comm: swapper Not tainted 4.1.6 #7 [ 0.241860] Hardware name: Generic AM43 (Flattened Device Tree) [ 0.241867] Backtrace: [ 0.241903] [<c0012b50>] (dump_backtrace) from [<c0012d74>] (show_stack+0x18/0x1c) [ 0.241911] r7:c01fc19c r6:00000095 r5:00000009 r4:00000000 [ 0.241952] [<c0012d5c>] (show_stack) from [<c045b0e8>] (dump_stack+0x24/0x28) [ 0.241970] [<c045b0c4>] (dump_stack) from [<c0038d10>] (warn_slowpath_common+0x88/0xb4) [ 0.241984] [<c0038c88>] (warn_slowpath_common) from [<c0038d74>] (warn_slowpath_fmt+0x38/0x40) [ 0.241992] r8:f2800e00 r7:ee0e0e90 r6:c047c728 r5:c0555f74 r4:c0556078 [ 0.242022] [<c0038d40>] (warn_slowpath_fmt) from [<c01fc19c>] (l3_interrupt_handler+0x344/0x38c) [ 0.242030] r3:ee0c4140 r2:c0556078 [ 0.242040] r4:c0556130 [ 0.242063] [<c01fbe58>] (l3_interrupt_handler) from [<c0064f2c>] (handle_irq_event_percpu+0x80/0x148) [ 0.242071] r10:c063b84f r9:ee0cf7c0 r8:00000013 r7:00000000 r6:00000000 r5:ee0e0b00 [ 0.242093] r4:ee0e0b00 [ 0.242109] [<c0064eac>] (handle_irq_event_percpu) from [<c006505c>] (handle_irq_event+0x68/0x90) [ 0.242116] r10:ee0cf7c0 r9:00000013 r8:ee004000 r7:00000000 r6:00000000 r5:ee0e0b00 [ 0.242137] r4:ee0cf7c0 [ 0.242156] [<c0064ff4>] (handle_irq_event) from [<c0067994>] (handle_fasteoi_irq+0xb8/0x1f8) [ 0.242163] r5:c05f9648 r4:ee0cf7c0 [ 0.242183] [<c00678dc>] (handle_fasteoi_irq) from [<c0064634>] (generic_handle_irq+0x34/0x44) [ 0.242190] r5:00000013 r4:00000013 [ 0.242209] [<c0064600>] (generic_handle_irq) from [<c0064898>] (__handle_domain_irq+0x5c/0xb0) [ 0.242216] r5:00000013 r4:c06175cc [ 0.242234] [<c006483c>] (__handle_domain_irq) from [<c00094c0>] (gic_handle_irq+0x2c/0x5c) [ 0.242242] r9:00000013 r8:60000113 r7:fa240100 r6:ee04bbb8 r5:c05f4384 r4:fa24010c [ 0.242275] [<c0009494>] (gic_handle_irq) from [<c0013880>] (__irq_svc+0x40/0x74) [ 0.242284] Exception stack(0xee04bbb8 to 0xee04bc00) [ 0.242295] bba0: 00000000 00000013 [ 0.242309] bbc0: 00000104 00000000 ee0cf7c0 ee0e0b00 00000013 ee0e0e90 60000113 00000013 [ 0.242323] bbe0: ee0cf7c0 ee04bc2c ee04bbe0 ee04bc00 c0067f78 c006635c 40000113 ffffffff [ 0.242330] r7:ee04bbec r6:ffffffff r5:40000113 r4:c006635c [ 0.242357] [<c00660d0>] (__setup_irq) from [<c00667b4>] (request_threaded_irq+0xcc/0x14c) [ 0.242364] r8:00000000 r7:ee0e0e90 r6:c01fbe58 r5:00000000 r4:ee0e0b00 [ 0.242395] [<c00666e8>] (request_threaded_irq) from [<c00689f4>] (devm_request_threaded_irq+0x60/0xa4) [ 0.242403] r10:00000002 r9:ee0dee10 r8:00000000 r7:00000013 r6:ee0e0e90 r5:ee0e0b50 [ 0.242424] r4:c01fbe58 r3:00000000 [ 0.242444] [<c0068994>] (devm_request_threaded_irq) from [<c01fbe04>] (omap_l3_probe+0x2b0/0x304) [ 0.242451] r9:c065aca8 r8:00000004 r7:ee0e0e90 r6:ee0dee00 r5:c065aca8 r4:00000000 [ 0.242488] [<c01fbb54>] (omap_l3_probe) from [<c02546ec>] (platform_drv_probe+0x4c/0xac) [ 0.242496] r10:00000000 r9:00000000 r8:00000000 r7:fffffdfb r6:c0617a14 r5:ee0dee10 [ 0.242516] r4:c065eab0 [ 0.242533] [<c02546a0>] (platform_drv_probe) from [<c0252fe8>] (driver_probe_device+0x184/0x2c4) [ 0.242540] r7:c0617a14 r6:00000000 r5:ee0dee10 r4:c065eab0 [ 0.242564] [<c0252e64>] (driver_probe_device) from [<c0253170>] (__device_attach+0x48/0x4c) [ 0.242571] r9:00000000 r8:c065ea8c r7:00000000 r6:c0253128 r5:ee0dee10 r4:c0617a14 [ 0.242599] [<c0253128>] (__device_attach) from [<c02513f0>] (bus_for_each_drv+0x68/0x9c) [ 0.242606] r5:ee0dee10 r4:00000000 [ 0.242623] [<c0251388>] (bus_for_each_drv) from [<c0252e28>] (device_attach+0x7c/0x90) [ 0.242630] r6:ee0dee44 r5:c061ce68 r4:ee0dee10 [ 0.242651] [<c0252dac>] (device_attach) from [<c025247c>] (bus_probe_device+0x8c/0xb0) [ 0.242658] r7:00000000 r6:ee0dee10 r5:c061ce68 r4:ee0dee18 [ 0.242693] [<c02523f0>] (bus_probe_device) from [<c02505c4>] (device_add+0x3e8/0x564) [ 0.242701] r7:00000000 r6:ee0dee10 r5:c061cd28 r4:ee0dee18 [ 0.242741] [<c02501dc>] (device_add) from [<c0348b84>] (of_device_add+0x38/0x40) [ 0.242748] r10:00000000 r9:00000000 r8:c05eb884 r7:ee0dee10 r6:00000000 r5:eefd83e0 [ 0.242769] r4:ee0dee00 [ 0.242788] [<c0348b4c>] (of_device_add) from [<c03493e0>] (of_platform_device_create_pdata+0x88/0xc8) [ 0.242807] [<c0349358>] (of_platform_device_create_pdata) from [<c034952c>] (of_platform_bus_create+0xf0/0x194) [ 0.242815] r7:00000001 r6:c05e79d4 r5:eefd83e0 r4:00000000 [ 0.242841] [<c034943c>] (of_platform_bus_create) from [<c034970c>] (of_platform_populate+0x64/0xc0) [ 0.242849] r10:00000000 r9:00000001 r8:00000000 r7:c05e79d4 r6:c05eb884 r5:eefd72cc [ 0.242869] r4:eefd83e0 [ 0.242893] [<c03496a8>] (of_platform_populate) from [<c05c1e78>] (pdata_quirks_init+0x40/0x4c) [ 0.242900] r9:c05b25ec r8:00000072 r7:ee0c4640 r6:c05f73e8 r5:c05eb884 r4:c05e79ac [ 0.242930] [<c05c1e38>] (pdata_quirks_init) from [<c05c1b7c>] (omap_generic_init+0x1c/0x24) [ 0.242937] r5:c05b4238 r4:c05f73e8 [ 0.242959] [<c05c1b60>] (omap_generic_init) from [<c05b4264>] (customize_machine+0x2c/0x4c) [ 0.242974] [<c05b4238>] (customize_machine) from [<c0009784>] (do_one_initcall+0x94/0x1dc) [ 0.242990] [<c00096f0>] (do_one_initcall) from [<c05b2db0>] (kernel_init_freeable+0x128/0x1cc) [ 0.242997] r10:c05e3a04 r9:c05b25ec r8:00000072 r7:c063e000 r6:c063e000 r5:00000003 [ 0.243018] r4:c05efd18 [ 0.243037] [<c05b2c88>] (kernel_init_freeable) from [<c04573cc>] (kernel_init+0x18/0xf0) [ 0.243044] r10:00000000 r9:00000000 r8:00000000 r7:00000000 r6:00000000 r5:c04573b4 [ 0.243064] r4:c063e000 [ 0.243082] [<c04573b4>] (kernel_init) from [<c000fa28>] (ret_from_fork+0x14/0x2c) [ 0.243089] r5:c04573b4 r4:00000000 [ 0.243124] ---[ end trace 116c968bdac91a12 ]--- [ 0.243165] omap_l3_noc 44000000.ocp: L3 application error: target 13 mod:1 (unclearable)
It looks like, as soon as the interrupt is registered from omap_l3_probe, it goes off, reporting the error. It seems to me that the cause is almost certainly something related to some clock in the L4_WKUP domain which I'm not setting up correctly in my .dts, and which used to not be necessary, but now is. I've been trying to debug this, but am having issues due to the lack of documentation surrounding the L3/L4 infrastructure (because, presumably, it's a big secret). Adding some debug tracing, I find that the target base is 0xf2800e00, if that helps anyone with access to any internal documentation.
I've attached my .dts file for reference.
Thanks in advance.
/*
* Copyright (C) 2014 Red Lion controls - http://www.redlion.net
*
* Based on am437x-gp-evm.dts.
*
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/* AM437x CPU9 module */
/dts-v1/;
#include "am4372.dtsi"
#include <dt-bindings/pinctrl/am43xx.h>
#include <dt-bindings/pwm/pwm.h>
/ {
model = "RedLion AM437x CPU9";
compatible = "redlion,sxni-am43xx_cpu9","ti,am4372","ti,am43";
vmmcsd_fixed: fixedregulator-sd {
compatible = "regulator-fixed";
regulator-name = "vmmcsd_fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
};
/* These override any aliases in included files */
aliases {
i2c0 = &i2c0;
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
serial3 = &uart4;
serial4 = &uart5;
ethernet0 = &cpsw_emac1;
ethernet1 = &cpsw_emac0;
};
};
&am43xx_pinmux {
pinctrl-names = "default";
pinctrl-0 = <&ddr3_vtt_toggle_default>;
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* my_rmii_1_pins_default */
0x10c ( PIN_INPUT | MUX_MODE1 ) /* (B14) mii1_crs.rmii1_crs_dv */
0x110 ( PIN_INPUT | MUX_MODE1 ) /* (B13) mii1_rx_er.rmii1_rxer */
0x114 ( PIN_OUTPUT | MUX_MODE1 ) /* (A13) mii1_tx_en.rmii1_txen */
0x128 ( PIN_OUTPUT | MUX_MODE1 ) /* (B15) mii1_txd0.rmii1_txd0 */
0x124 ( PIN_OUTPUT | MUX_MODE1 ) /* (A14) mii1_txd1.rmii1_txd1 */
0x140 ( PIN_INPUT | MUX_MODE1 ) /* (F17) mii1_rxd0.rmii1_rxd0 */
0x13c ( PIN_INPUT | MUX_MODE1 ) /* (B16) mii1_rxd1.rmii1_rxd1 */
0x144 ( PIN_INPUT | MUX_MODE0 ) /* (A16) rmii1_ref_clk.rmii1_refclk */
/* my_mii_1_pins_default */
0x78 ( PIN_INPUT | MUX_MODE1 ) /* (A3) gpmc_be1n.gmii2_col */
0x84 ( PIN_INPUT | MUX_MODE8 ) /* (F10) gpmc_csn2.gmii2_crs */
0x40 ( PIN_OUTPUT | MUX_MODE1 ) /* (C3) gpmc_a0.gmii2_txen */
0x44 ( PIN_INPUT | MUX_MODE1 ) /* (C5) gpmc_a1.gmii2_rxdv */
0x58 ( PIN_INPUT | MUX_MODE1 ) /* (E8) gpmc_a6.gmii2_txclk */
0x5c ( PIN_INPUT | MUX_MODE1 ) /* (F6) gpmc_a7.gmii2_rxclk */
0x54 ( PIN_OUTPUT | MUX_MODE1 ) /* (E7) gpmc_a5.gmii2_txd0 */
0x50 ( PIN_OUTPUT | MUX_MODE1 ) /* (D7) gpmc_a4.gmii2_txd1 */
0x4c ( PIN_OUTPUT | MUX_MODE1 ) /* (A4) gpmc_a3.gmii2_txd2 */
0x48 ( PIN_OUTPUT | MUX_MODE1 ) /* (C6) gpmc_a2.gmii2_txd3 */
0x6c ( PIN_INPUT | MUX_MODE1 ) /* (D8) gpmc_a11.gmii2_rxd0 */
0x68 ( PIN_INPUT | MUX_MODE1 ) /* (G8) gpmc_a10.gmii2_rxd1 */
0x64 ( PIN_INPUT | MUX_MODE1 ) /* (B4) gpmc_a9.gmii2_rxd2 */
0x60 ( PIN_INPUT | MUX_MODE1 ) /* (F7) gpmc_a8.gmii2_rxd3 */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* my_rmii_1_pins_sleep */
0x10c ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (B14) mii1_crs.rmii1_crs_dv */
0x110 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (B13) mii1_rx_er.rmii1_rxer */
0x114 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (A13) mii1_tx_en.rmii1_txen */
0x128 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (B15) mii1_txd0.rmii1_txd0 */
0x124 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (A14) mii1_txd1.rmii1_txd1 */
0x140 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (F17) mii1_rxd0.rmii1_rxd0 */
0x13c ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (B16) mii1_rxd1.rmii1_rxd1 */
0x144 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (A16) rmii1_ref_clk.rmii1_refclk */
/* Slave 2 */
0x78 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (A3) gpmc_be1n.gmii2_col */
0x84 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (F10) gpmc_csn2.gmii2_crs */
0x40 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (C3) gpmc_a0.gmii2_txen */
0x44 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (C5) gpmc_a1.gmii2_rxdv */
0x58 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (E8) gpmc_a6.gmii2_txclk */
0x5c ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (F6) gpmc_a7.gmii2_rxclk */
0x54 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (E7) gpmc_a5.gmii2_txd0 */
0x50 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (D7) gpmc_a4.gmii2_txd1 */
0x4c ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (A4) gpmc_a3.gmii2_txd2 */
0x48 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (C6) gpmc_a2.gmii2_txd3 */
0x6c ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (D8) gpmc_a11.gmii2_rxd0 */
0x68 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (G8) gpmc_a10.gmii2_rxd1 */
0x64 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (B4) gpmc_a9.gmii2_rxd2 */
0x60 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (F7) gpmc_a8.gmii2_rxd3 */
>;
};
mdio_1_pins_default: mdio_1_pins_default {
pinctrl-single,pins = <
0x14c ( PIN_OUTPUT | MUX_MODE0 ) /* (B17) mdio_clk.mdio_clk */
0x148 ( PIN_INPUT | MUX_MODE0 ) /* (A17) mdio_data.mdio_data */
>;
};
mdio_1_pins_sleep: mdio_1_pins_sleep {
pinctrl-single,pins = <
0x14c ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (B17) mdio_clk.mdio_clk */
0x148 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (A17) mdio_data.mdio_data */
>;
};
memory_card_pins_default: memory_card_pins_default {
pinctrl-single,pins = <
0x100 ( PIN_INPUT | MUX_MODE0 ) /* (D1) mmc0_clk.mmc0_clk */
0x104 ( PIN_INPUT | MUX_MODE0 ) /* (D2) mmc0_cmd.mmc0_cmd */
0xfc ( PIN_INPUT | MUX_MODE0 ) /* (C1) mmc0_dat0.mmc0_dat0 */
0xf8 ( PIN_INPUT | MUX_MODE0 ) /* (C2) mmc0_dat1.mmc0_dat1 */
0xf4 ( PIN_INPUT | MUX_MODE0 ) /* (B2) mmc0_dat2.mmc0_dat2 */
0xf0 ( PIN_INPUT | MUX_MODE0 ) /* (B1) mmc0_dat3.mmc0_dat3 */
0x160 ( PIN_INPUT | MUX_MODE5 ) /* (R25) spi0_cs1.mmc0_sdcd */
0x1a0 ( PIN_OUTPUT | MUX_MODE4 ) /* (L23) mcasp0_aclkr.mmc0_sdwp */
>;
};
memory_card_pins_sleep: memory_card_pins_sleep {
pinctrl-single,pins = <
0x100 ( PIN_INPUT | MUX_MODE0 ) /* (D1) mmc0_clk.mmc0_clk */
0x104 ( PIN_INPUT | MUX_MODE0 ) /* (D2) mmc0_cmd.mmc0_cmd */
0xfc ( PIN_INPUT | MUX_MODE0 ) /* (C1) mmc0_dat0.mmc0_dat0 */
0xf8 ( PIN_INPUT | MUX_MODE0 ) /* (C2) mmc0_dat1.mmc0_dat1 */
0xf4 ( PIN_INPUT | MUX_MODE0 ) /* (B2) mmc0_dat2.mmc0_dat2 */
0xf0 ( PIN_INPUT | MUX_MODE0 ) /* (B1) mmc0_dat3.mmc0_dat3 */
/*
* The presence and write protect pins are not slept
* here so we can detect a card insert.
*/
>;
};
ddr3_vtt_toggle_default: ddr_vtt_toggle_default {
pinctrl-single,pins = <
0x1c0 ( PIN_INPUT | MUX_MODE7 ) /* (AC20) cam0_pclk.gpio4[4] */
>;
};
my_glue_2_pins_default: my_glue_2_pins_default {
pinctrl-single,pins = <
0x27c ( PIN_INPUT | MUX_MODE0 ) /* (G22) WARMRSTn.nRESETIN_OUT */
0x280 ( PIN_INPUT | MUX_MODE0 ) /* (Y23) PWRONRSTn.porz */
>;
};
mdio_pruss1_eth0_pins_default: mdio_pruss1_eth0_pins_default {
pinctrl-single,pins = <
0x8c ( PIN_OUTPUT | MUX_MODE5 ) /* (A12) gpmc_clk.pr1_mdio_mdclk */
0x88 ( PIN_INPUT | MUX_MODE5 ) /* (B12) gpmc_csn3.pr1_mdio_data */
>;
};
my_i2c_1_pins_default: my_i2c_1_pins_default {
pinctrl-single,pins = <
0x18c ( PIN_INPUT | MUX_MODE0 ) /* (Y22) I2C0_SCL.I2C0_SCL */
0x188 ( PIN_INPUT | MUX_MODE0 ) /* (AB24) I2C0_SDA.I2C0_SDA */
>;
};
my_debugss_1_pins_default: my_debugss_1_pins_default {
pinctrl-single,pins = <
0x290 ( PIN_INPUT | MUX_MODE0 ) /* (Y24) TMS.TMS */
0x294 ( PIN_INPUT | MUX_MODE0 ) /* (Y20) TDI.TDI */
0x298 ( PIN_OUTPUT | MUX_MODE0 ) /* (AA24) TDO.TDO */
0x29c ( PIN_INPUT | MUX_MODE0 ) /* (AA25) TCK.TCK */
0x2a0 ( PIN_INPUT | MUX_MODE0 ) /* (Y25) nTRST.nTRST */
>;
};
nand_interface_pins_default: nand_interface_pins_default {
pinctrl-single,pins = <
0x1c ( PIN_INPUT | MUX_MODE0 ) /* (B8) gpmc_ad7.gpmc_ad7 */
0x18 ( PIN_INPUT | MUX_MODE0 ) /* (C8) gpmc_ad6.gpmc_ad6 */
0x14 ( PIN_INPUT | MUX_MODE0 ) /* (A7) gpmc_ad5.gpmc_ad5 */
0x10 ( PIN_INPUT | MUX_MODE0 ) /* (B7) gpmc_ad4.gpmc_ad4 */
0xc ( PIN_INPUT | MUX_MODE0 ) /* (A6) gpmc_ad3.gpmc_ad3 */
0x8 ( PIN_INPUT | MUX_MODE0 ) /* (B6) gpmc_ad2.gpmc_ad2 */
0x4 ( PIN_INPUT | MUX_MODE0 ) /* (A5) gpmc_ad1.gpmc_ad1 */
0x0 ( PIN_INPUT | MUX_MODE0 ) /* (B5) gpmc_ad0.gpmc_ad0 */
0x70 ( PIN_INPUT | MUX_MODE0 ) /* (A2) gpmc_wait0.gpmc_wait0 */
0x74 ( PIN_OUTPUT | MUX_MODE0 ) /* (B3) gpmc_wpn.gpmc_wpn */
0x7c ( PIN_OUTPUT | MUX_MODE0 ) /* (A8) gpmc_csn0.gpmc_csn0 */
0x90 ( PIN_OUTPUT | MUX_MODE0 ) /* (A9) gpmc_advn_ale.gpmc_advn_ale */
0x94 ( PIN_OUTPUT | MUX_MODE0 ) /* (E10) gpmc_oen_ren.gpmc_oen_ren */
0x98 ( PIN_OUTPUT | MUX_MODE0 ) /* (D10) gpmc_wen.gpmc_wen */
0x9c ( PIN_OUTPUT | MUX_MODE0 ) /* (C10) gpmc_be0n_cle.gpmc_be0n_cle */
>;
};
main_rs232_pins_default: main_rs232_pins_default {
pinctrl-single,pins = <
0x1e8 ( PIN_INPUT | MUX_MODE1 ) /* (AB20) cam1_data0.uart1_rxd */
0x1ec ( PIN_OUTPUT | MUX_MODE1 ) /* (AC21) cam1_data1.uart1_txd */
0x1f0 ( PIN_INPUT | MUX_MODE1 ) /* (AD21) cam1_data2.uart1_ctsn */
0x1f4 ( PIN_INPUT | MUX_MODE1 ) /* (AE22) cam1_data3.uart1_rtsn */
0x200 ( PIN_INPUT | MUX_MODE1 ) /* (AD23) cam1_data6.uart1_dcdn */
0x1fc ( PIN_INPUT | MUX_MODE1 ) /* (AE23) cam1_data5.uart1_dsrn */
0x204 ( PIN_INPUT | MUX_MODE1 ) /* (AE24) cam1_data7.uart1_dtrn */
0x1f8 ( PIN_INPUT | MUX_MODE1 ) /* (AD22) cam1_data4.uart1_rin */
>;
};
rs485_pins_default: rs485_pins_default {
pinctrl-single,pins = <
0x12c ( PIN_INPUT | MUX_MODE1 ) /* (D14) mii1_tx_clk.uart2_rxd */
0x130 ( PIN_OUTPUT | MUX_MODE1 ) /* (D13) mii1_rx_clk.uart2_txd */
>;
};
expansion_pins_default: expansion_pins_default {
pinctrl-single,pins = <
0x11c ( PIN_INPUT | MUX_MODE3 ) /* (C16) mii1_txd3.uart4_rxd */
0x120 ( PIN_OUTPUT | MUX_MODE3 ) /* (C13) mii1_txd2.uart4_txd */
>;
};
gps_pins_default: gps_pins_default {
pinctrl-single,pins = <
0x108 ( PIN_INPUT | MUX_MODE3 ) /* (D16) mii1_col.uart5_rxd */
0x118 ( PIN_OUTPUT | MUX_MODE3 ) /* (A15) mii1_rx_dv.uart5_txd */
>;
};
my_spi_1_pins_default: my_spi_1_pins_default {
pinctrl-single,pins = <
0x250 ( PIN_INPUT | MUX_MODE0 ) /* (P25) spi4_sclk.spi4_sclk */
0x254 ( PIN_INPUT | MUX_MODE0 ) /* (R24) spi4_d0.spi4_d0 */
0x258 ( PIN_INPUT | MUX_MODE0 ) /* (P24) spi4_d1.spi4_d1 */
0x25c ( PIN_OUTPUT | MUX_MODE0 ) /* (N25) spi4_cs0.spi4_cs0 */
>;
};
my_spi_1_pins_sleep: my_spi_1_pins_sleep {
pinctrl-single,pins = <
0x250 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (P25) spi4_sclk.spi4_sclk */
0x254 ( PIN_INPUT_PULLUP | MUX_MODE0 ) /* (R24) spi4_d0.spi4_d0 */
0x258 ( PIN_OUTPUT | MUX_MODE0 ) /* (P24) spi4_d1.spi4_d1 */
0x25c ( PIN_OUTPUT | MUX_MODE0 ) /* (N25) spi4_cs0.spi4_cs0 */
>;
};
my_gpio_2_pins_default: my_gpio_2_pins_default {
pinctrl-single,pins = <
0x150 ( PIN_INPUT | MUX_MODE7 ) /* (P23) spi0_sclk.gpio0[2] */
0x154 ( PIN_INPUT | MUX_MODE7 ) /* (T22) spi0_d0.gpio0[3] */
0x158 ( PIN_INPUT | MUX_MODE7 ) /* (T21) spi0_d1.gpio0[4] */
0x15c ( PIN_INPUT | MUX_MODE7 ) /* (T20) spi0_cs0.gpio0[5] */
0x164 ( PIN_INPUT | MUX_MODE7 ) /* (G24) eCAP0_in_PWM0_out.gpio0[7] */
0x134 ( PIN_INPUT | MUX_MODE9 ) /* (C14) mii1_rxd3.gpio0[10] */
0x138 ( PIN_INPUT | MUX_MODE9 ) /* (E16) mii1_rxd2.gpio0[11] */
0x178 ( PIN_INPUT | MUX_MODE7 ) /* (K22) uart1_ctsn.gpio0[12] */
0x17c ( PIN_INPUT | MUX_MODE7 ) /* (L22) uart1_rtsn.gpio0[13] */
0x180 ( PIN_INPUT | MUX_MODE7 ) /* (K21) uart1_rxd.gpio0[14] */
0x184 ( PIN_INPUT | MUX_MODE7 ) /* (L21) uart1_txd.gpio0[15] */
0x2c0 ( PIN_INPUT | MUX_MODE7 ) /* (G21) USB0_DRVVBUS.gpio0[18] */
0x1a4 ( PIN_INPUT | MUX_MODE9 ) /* (K23) mcasp0_fsr.gpio0[19] */
0x274 ( PIN_INPUT | MUX_MODE7 ) /* (C24) xdma_event_intr1.gpio0[20] */
0x268 ( PIN_INPUT | MUX_MODE9 ) /* (P20) spi2_d1.gpio0[21] */
0x260 ( PIN_INPUT | MUX_MODE9 ) /* (N20) spi2_sclk.gpio0[22] */
0x26c ( PIN_INPUT | MUX_MODE9 ) /* (T23) spi2_cs0.gpio0[23] */
0x278 ( PIN_INPUT | MUX_MODE7 ) /* (H20) clkreq.gpio0[24] */
0x2c4 ( PIN_INPUT | MUX_MODE9 ) /* (F25) USB1_DRVVBUS.gpio0[25] */
0x28 ( PIN_INPUT | MUX_MODE7 ) /* (F11) gpmc_ad10.gpio0[26] */
0x2c ( PIN_INPUT | MUX_MODE7 ) /* (D11) gpmc_ad11.gpio0[27] */
>;
};
my_gpio_3_pins_default: my_gpio_3_pins_default {
pinctrl-single,pins = <
0x1b0 ( PIN_INPUT | MUX_MODE7 ) /* (AE17) cam0_hd.gpio4[0] */
0x1b4 ( PIN_INPUT | MUX_MODE7 ) /* (AD18) cam0_vd.gpio4[1] */
0x1b8 ( PIN_INPUT | MUX_MODE7 ) /* (AC18) cam0_field.gpio4[2] */
0x1bc ( PIN_INPUT | MUX_MODE7 ) /* (AD17) cam0_wen.gpio4[3] */
/* gpio4_4 (0x1c0) is in the vtt_toggle_default section, above, because that is what it drives */
0x1c4 ( PIN_INPUT | MUX_MODE7 ) /* (AB19) cam0_data8.gpio4[5] */
0x1c8 ( PIN_INPUT | MUX_MODE7 ) /* (AA19) cam0_data9.gpio4[6] */
0x1cc ( PIN_INPUT | MUX_MODE7 ) /* (AC24) cam1_data9.gpio4[7] */
0x1d0 ( PIN_INPUT | MUX_MODE7 ) /* (AD24) cam1_data8.gpio4[8] */
0x1d4 ( PIN_INPUT | MUX_MODE7 ) /* (AD25) cam1_hd.gpio4[9] */
0x1d8 ( PIN_INPUT | MUX_MODE7 ) /* (AC23) cam1_vd.gpio4[10] */
0x1dc ( PIN_INPUT | MUX_MODE7 ) /* (AE21) cam1_pclk.gpio4[11] */
0x1e0 ( PIN_INPUT | MUX_MODE7 ) /* (AC25) cam1_field.gpio4[12] */
0x1e4 ( PIN_INPUT | MUX_MODE7 ) /* (AB25) cam1_wen.gpio4[13] */
0x210 ( PIN_INPUT | MUX_MODE7 ) /* (Y18) cam0_data2.gpio4[24] */
0x214 ( PIN_INPUT | MUX_MODE7 ) /* (AA18) cam0_data3.gpio4[25] */
0x218 ( PIN_INPUT | MUX_MODE7 ) /* (AE19) cam0_data4.gpio4[26] */
0x21c ( PIN_INPUT | MUX_MODE7 ) /* (AD19) cam0_data5.gpio4[27] */
0x220 ( PIN_INPUT | MUX_MODE7 ) /* (AE20) cam0_data6.gpio4[28] */
0x224 ( PIN_INPUT | MUX_MODE7 ) /* (AD20) cam0_data7.gpio4[29] */
>;
};
my_osc_1_pins_default: my_osc_1_pins_default {
pinctrl-single,pins = <
0x288 ( PIN_OUTPUT | MUX_MODE0 ) /* (C25) XTALIN.OSC0_IN */
0x28c ( PIN_OUTPUT | MUX_MODE0 ) /* (B25) XTALOUT.OSC0_OUT */
>;
};
analog_ins_pins_default: analog_ins_pins_default {
pinctrl-single,pins = <
0x270 ( PIN_INPUT | MUX_MODE1 ) /* (D24) xdma_event_intr0.ext_hw_trigger */
>;
};
};
&i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&my_i2c_1_pins_default>;
clock-frequency = <400000>;
tca6424a: tca6424a@22 {
compatible = "ti,tca6424";
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
};
};
&gpio0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&my_gpio_2_pins_default>;
};
&gpio4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&my_gpio_3_pins_default>;
};
&mac {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
status = "okay";
};
&davinci_mdio {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&mdio_1_pins_default>;
pinctrl-1 = <&mdio_1_pins_sleep>;
status = "okay";
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <1>;
phy-mode = "rmii";
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <0>;
phy-mode = "mii";
};
&phy_sel {
rmii-clock-ext;
};
&mmc1 {
status = "okay";
vmmc-supply = <&vmmcsd_fixed>;
bus-width = <4>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&memory_card_pins_default>;
pinctrl-1 = <&memory_card_pins_sleep>;
cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
};
&elm {
status = "okay";
};
&gpmc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nand_interface_pins_default>;
ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
nand@0,0 {
compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
ready-gpio = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <40>;
gpmc,cs-wr-off-ns = <40>;
gpmc,adv-on-ns = <0>;
gpmc,adv-rd-off-ns = <25>;
gpmc,adv-wr-off-ns = <25>;
gpmc,we-on-ns = <0>;
gpmc,we-off-ns = <20>;
gpmc,oe-on-ns = <3>;
gpmc,oe-off-ns = <30>;
gpmc,access-ns = <30>;
gpmc,rd-cycle-ns = <40>;
gpmc,wr-cycle-ns = <40>;
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
#address-cells = <1>;
#size-cells = <1>;
};
};
/*
* uart0 does exist in the included files, and is NOT disabled by default.
* Disable it here, as we do not use it.
*/
&uart0 {
status = "disabled";
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_rs232_pins_default>;
};
&uart2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&rs485_pins_default>;
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&expansion_pins_default>;
};
&uart5 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&gps_pins_default>;
};
&wkup_m3_ipc {
ti,set-io-isolation;
ti,scale-data-fw = "am43x-evm-scale-data.bin";
};
// Enabling this causes a crash. Need to debug.
#if 0
&rtc {
status = "okay";
ext-clk-src;
};
#endif
