AM335x Design Rules for Bypass Capacitors placed on DDR_VREF rail

Daisuke Maeda

Guru 19845 points

In Figure 7-39 on datasheet (SPRS717I), there are bypass capacitors of 0.1μF each placed on DDR_VREF rail.

Are there other design rules for these capacitors?

In "7.7.2.2.2.6 Bulk Bypass Capacitors" and "7.7.2.2.2.7 High-Speed (HS) Bypass Capacitors" on datasheet (SPRS717I), it seems that there are not the rules for the DDR_VREF rail.

Best regards,

Daisuke

over 8 years ago

0 Yordan Kovachev over 8 years ago

TI__Guru**** 161600 points

Hi Daisuke,

"Are there other design rules for these capacitors?"

You can always refer to TI reference boards (Beagleboard Black, Starter Kit or GP EVM: processors.wiki.ti.com/.../AM335x_Boards).

There are also the following guides:
processors.wiki.ti.com/.../AM335x_Schematic_Checklist
processors.wiki.ti.com/.../AM335x_Hardware_Design_Guide
processors.wiki.ti.com/.../BGA_decoupling

However, NOTE that some wiki guides may be older the the AM335x datasheet (and there could be discrepencies), in such cases FOLLOW THE DATASHEET RECOMMENDATIONS.

Hope this helps.

Best Regards,
Yordan

0 Biser Gatchev-XID over 8 years ago

TI__Guru**** 393215 points

Hi,

See Note B in Figure 7-39. Also check section 7.7.2.2.2.10 "DDR_VREF Routing". VREF bypass capacitors must be placed as close as possible to the pins they are bypassing.

0 Daisuke Maeda over 8 years ago in reply to Yordan Kovachev

Guru 19845 points

Hi Yordan-san,

Thank you for your reply.

I will refer to the wiki of "General BGA PCB design". I have checked the references except it.

I think that the TI reference boards can not be referred to because the boards seem to not follow the guidelines of datasheet. In the reference boards, there are no bypass capacitors on DDR_VREF rail, or only one capacitor of 0.01μF is placed near the VREF pin of memory.

Best regards,

Daisuke

0 Daisuke Maeda over 8 years ago in reply to Biser Gatchev-XID

Guru 19845 points

Hi Biser-san,

Thank you for your reply.

In "7.7.2.2.2.6 Bulk Bypass Capacitors" and "7.7.2.2.2.7 High-Speed (HS) Bypass Capacitors" on datasheet (SPRS717I), it seems that there are NOT the rules for the DDR_VREF rail.

Are there the recommendations such as Table 7-48 or Table 7-49?

Is it recommended to use the smallest possible package size, to reduce lead inductance?

Best regards,

Daisuke

0 Biser Gatchev-XID over 8 years ago in reply to Daisuke Maeda

TI__Guru**** 393215 points

Daisuke Maeda said:

In "7.7.2.2.2.6 Bulk Bypass Capacitors" and "7.7.2.2.2.7 High-Speed (HS) Bypass Capacitors" on datasheet (SPRS717I), it seems that there are NOT the rules for the DDR_VREF rail.Are there the recommendations such as Table 7-48 or Table 7-49?

No, these tables cover VDDS_DDR bypassing only. I already pointed you to recommendations for VREF in my previous post.

Daisuke Maeda said:
Is it recommended to use the smallest possible package size, to reduce lead inductance?

Yes.

0 Daisuke Maeda over 8 years ago in reply to Biser Gatchev-XID

Guru 19845 points

Hi Biser-san,

Thank you for your reply.

Best regards,

Daisuke

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AM335x Design Rules for Bypass Capacitors placed on DDR_VREF rail