AM335x control of EMAC transmission packets timing

Daisuke Maeda

Guru 19835 points

Our customer wants to control an interval between transmission packets which is variable, not periodic. Could you tell me how to implement it with better precision?

Best regards,

Daisuke

over 7 years ago

0 Biser Gatchev-XID over 7 years ago

TI__Guru**** 393215 points

What software are you using?

0 Daisuke Maeda over 7 years ago in reply to Biser Gatchev-XID

Guru 19835 points

Hi Biser-san,

Thank you for your reply.

Our customer implements software based on StarterWare and RTOS Processor SDK, but they want to know how to implement in bare metal which is not to depend on the software.

Best regards,

Daisuke

0 Biser Gatchev-XID over 7 years ago in reply to Daisuke Maeda

TI__Guru**** 393215 points

I have notified the factory team. They will respond here.

0 Daisuke Maeda over 7 years ago in reply to Biser Gatchev-XID

Guru 19835 points

Hi Biser-san,

Thank you for your cooperation.

Any update on this?

Please give me an answer as soon as possible. Your prompt reply would be appreciated.

Best regards,

Daisuke

0 Biser Gatchev-XID over 7 years ago in reply to Daisuke Maeda

TI__Guru**** 393215 points

I am checking with the factory team. They will reply directly here when feedback is available.

0 David Zaucha over 7 years ago in reply to Biser Gatchev-XID

TI__Expert 7570 points

Hi Daisuke-san

Regretfully there is no bare metal way to control the interval between transmission packets that is available at this time.

David

0 Daisuke Maeda over 7 years ago in reply to David Zaucha

Guru 19835 points

Hi David-san,

Thank you for your reply.

Is there an way using RTOS, e.g. TI RTOS?

It should be able to be achieved in AM335x to control the interval between transmission packets because AM335x support EtherCAT Master Protocol by using software with CPSW.

Best regards,

Daisuke

0 David Zaucha over 7 years ago in reply to Daisuke Maeda

TI__Expert 7570 points

Hi Daisuke-san

Processor SDK 3.0.0 supports Time Trigged Send on AM3, AM4 and AM5 Industrial EVMs.
Information on TTS is available at processors.wiki.ti.com/.../ICSS_EMAC_LLD_developers_guide

David

0 Daisuke Maeda over 7 years ago in reply to David Zaucha

Guru 19835 points

Hi David-san,

Thank you for your reply.

TTS is used to control the interval between cyclic packets sent, but is not used to control the interval between acyclic packets sent, furthermore it supports ICSS, but does not support CPSW.

I understand that there is no way using hardware capability to control the interval between acyclic packets sent.

Our customer will use a way to refer to a timer counter.

Best regards,

Daisuke

Processors

Processors forum

AM335x control of EMAC transmission packets timing