Hello,
We are using GPMC interface - NAND and FPGAs are on GPMC.
As SYSBOOT bits are on the GPMC_AD[15:0] pins, I am directly keeping pull-up/pull-down resistors on these pins (bus).
Do you have any recommendations for pull-up/pull-down resistor values for this scenario? - which latches the boot setting properly without disturbing transactions on the bus.
Thanks,
Srinivas J