AM5716 EMIF FIFO

Kzk

Hello,

What is the E2M L3 command/data interface in Figure 15-48 FIFO Block Diagram in TRM? Is it connected to MPU_MA directly? Is System L3 command/data interface also connected to L3_MAIN?

Regards,
Kazu

over 7 years ago

0 Biser Gatchev-XID over 7 years ago

TI__Guru**** 393215 points

Hi,

I will ask the DDR experts for clarification. They will respond directly here.

0 Kzk over 7 years ago in reply to Biser Gatchev-XID

Genius 5785 points

Hi Biser,

Biser Gatchev-XID said:
I will ask the DDR experts for clarification. They will respond directly here.

I have not yet received any information from them. I need your help.

Regards,
Kazu

0 Biser Gatchev-XID over 7 years ago in reply to Kzk

TI__Guru**** 393215 points

I have escalated this.

0 Kzk over 7 years ago in reply to Biser Gatchev-XID

Genius 5785 points

Hi Biser,

I'm still waiting for an answer from DDR experts. It's been a month now. Thank you for your help.

Regards,
Kazu

0 Rogerio Almeida over 7 years ago in reply to Kzk

TI__Mastermind 26025 points

Kazu,

I am escalating this post....sorry for the delay...

0 Brad Griffis over 7 years ago

TI__Guru*** 125430 points

I recommend instead looking at Figure 4-1. MPU Subsystem Overview. MPU_MA indeed connects directly to the EMIF.

0 Kzk over 7 years ago in reply to Brad Griffis

Genius 5785 points

Hello,

Brad Griffis said:
I recommend instead looking at Figure 4-1. MPU Subsystem Overview. MPU_MA indeed connects directly to the EMIF.

Thank you for your reply. Does E2M mean EMIF to MPU? Is "E2M L3" typo for just "E2M"? I guess E2M block is connected to MPU_MA. I think System L3 interface block in Figure 15-48 is also connected to L3_MAIN. Please give me some advice.

Regards,
Kazu

0 Brad Griffis over 7 years ago in reply to Kzk

TI__Guru*** 125430 points

I think so... Another good diagram is Figure 15-47. EMIF Block Diagram. It shows the clear separation of "MPU" and "L3".

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AM5716 EMIF FIFO