Hello,
I have a question about "SSC" of "AM335x".
"AM335x" incorporates SSCG, but the explanation has a vague point.
There is a register for the setting to use it for "MPU,DDR,CORE,PER".
for example
8-90. CM_SSC_DELTAMSTEP_DPLL_MPU Register
8-95. CM_SSC_DELTAMSTEP_DPLL_DDR Register
8-105.CM_SSC_DELTAMSTEP_DPLL_CORE Register
8-110.CM_SSC_DELTAMSTEP_DPLL_PER Register
etc.
It is written for the "NOTE:" that only "LCD,MPU" is usable.
Even if the register exists , but not implemented as a function of "SSC"?
Or is it the mistake of mention?
"SPRUH73N(October 2011 Revised June 2016)"
8.1.6.6 Spread Spectrum Clocking (SSC)
SSC can be enabled/disabled using bit CM_CLKMODE_DPLL_xxx.DPLL_SSC_EN (where xxx can be
any one of the following DPLLs: MPU, DDR, DISP, CORE, PER).
NOTE:Spread spectrum clock is only supported for the LCD and MPU PLLs on this device.
Spread spectrum clocking is not supported for DDR, PER, DISP, and CORE PLLs.
Best regards , Isao
