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AM335x PRU EtherCAT Firmware

g.f.
Guru 15510 points
Other Parts Discussed in Thread: TLK110

Hi,

I have questions about AM335x PRU ICSS EtherCAT firmware APIs.

The question is about "enhanced link detection".

In following TI wiki page, it said
processors.wiki.ti.com/.../PRU_ICSS_EtherCAT_firmware_API_guide
********************************************************************************
Enhanced link detection /Redundancy support - connect pr1_mii0_rxlink to
LED_LINK/LED_SPEED from PHY
********************************************************************************
In this case, I guess Enhanced link is enabled by setting in bsp_init()API as following:
////////////////////////////////////////////////////////////////
mdioParamsInit.enhancedlink_enable = TIESC_MDIO_RX_LINK_DISABLE;
////////////////////////////////////////////////////////////////

Here is my questions:
Q1. If  "Enhanced link detection" is disabled, will "Redundancy" be supported?
   Or is "Redundancy" only be supported when enhanced link detection is enabled?

Q2. If EtherPHY have a pin which is corresponding to TLK110 LED_SPEED pin and
   connecting to "pr1_mii1_rxlink pin and pr1_mii0_rxlink pin",
   is it availabe to use enhanced link detection feature by
   enabling "Enhanced link detection" by setting in bsp_init()API?
   By the way, the EtherPHY is not TI product.

Q3.If Q3 is available, will it support "Redundancy"?

best regards,
g.f.

  • 0
    TI__Guru**** 393215 points
    The EtherCAT experts have been notified. They will respond here.
  • 0
    TI__Mastermind 32590 points

    Hi g.f, I believe "enhanced link detection" and "redundancy" are independent but I will confirm and come back to you.

    thank you,

    Paula

  • 0 in reply to Paula Carrillo
    TI__Mastermind 32590 points
    Hi g.f, it seems indeed "enhanced link detection" is required for correctly support "redundancy"

    Please refer to:
    processors.wiki.ti.com/.../PRU_ICSS_EtherCAT_Release_Notes

    - Using MII_RX_LINK (fast - depending on PHY link loss detection latency) – mandatory for cable redundancy support.

    Thank you,
    Paula
  • 0 in reply to Paula Carrillo
    Guru 15510 points
    Hi Paula,

    Thank you for the reply and sorry for the delay.

    I have additional question to make me sure.

    Q1.
    Is the support of redundancy, available by only change in the software(enabling "enhanced link detection")?
    In hardware point, I understood that MII_RX_LINK need to be connected to link status pin of EtherPHY.

    Q2.
    And I also want to know that PRU EtherCAT Firmware support other company's EtherPHY.
    My customer are using other company's EtherPHY.
    They are asking me that if this other PHY have a pin correspond to LINK_SPEED pin of TLK110,
    connect this pin to PRU_MII_RX_LINK and enable the "enhanced link detection" in PRU Firmware,
    does it support redundancy?

    best regards,
    g.f.
  • 0 in reply to g.f.
    TI__Mastermind 32590 points
    Hi, your customer could use another PHY as long as they do a correct HW pin connections. Also they only need to do SW changes in order to enable redundancy. Additionally, I got some comments from one of our experts, when using an Enhanced link detection for EtherCAT communication, the ICSS EMAC uses a polling mechanism to check for link status changes on the PHY. This polling frequency is configurable. The default is in the range of 200-250 usec. This polling frequency was selected for the TLK PHYs. Other PHYs may require a different polling periods.

    Thank you,
    Paula
  • 0 in reply to Paula Carrillo
    Guru 15510 points
    Hi Paula,

    Thank you so much for the anwser and I'm sorry for the delay.
    I understood that another PHY can be used and redundancy are supported.
    By the way, I understood that polling frequency is cofigurable, but I can't find the source file.
    Can you show me the appropriate source file and the place to be change the polling frequency for other PHY?

    best regards,
    g.f.
  • 0 in reply to g.f.
    TI__Mastermind 32590 points

    Hi g.f, I am confirming with the experts. I will come back to you soon.

    thanks,

    Paula

  • 0 in reply to Paula Carrillo
    TI__Mastermind 32590 points
    Hi g.f, I double check with the developers, we use Interrupts (instead of polling) for link status. Sorry for this confusion.
    processors.wiki.ti.com/.../Processor_SDK_RTOS_ICSS-EMAC-Design

    As we stated before, for EtherCAT redundancy you need to use Fast link detection. This fast mode can be configured by selecting the linksel bit in MDIOUserPhySel register in application (MLINK input pins).

    About configuring a new PHY, I got the information that after making the PIN connections you only need to determine the new PHY addresses in MDIO.

    Thank you,
    Paula
  • 0 in reply to Paula Carrillo
    Guru 15510 points
    Hi Paula,

    Thank you for the response.
    I'm very sorry, but let me ask to make me sure.

    So, to support EtherCAT redundancy, Fast link detection is need it and this will be realize by connecting
    "pr1_mii1_rxlink pin and pr1_mii0_rxlink pin" , is it correct?

    By the way, it seem that "pr1_mii1_rxlink pin and pr1_mii0_rxlink pin" are only used for EtherCAT redundancy, is it correct?
    Or is there any other use case for PRU_MII_RXLINK signals?

    best regards,
    g.f.
  • 0 in reply to g.f.
    TI__Mastermind 32590 points

    Hi g.f, please see answers below in green

    So, to support EtherCAT redundancy, Fast link detection is need it and this will be realize by connecting
    "pr1_mii1_rxlink pin and pr1_mii0_rxlink pin" , is it correct?

    PC-- this is correct

    By the way, it seem that "pr1_mii1_rxlink pin and pr1_mii0_rxlink pin" are only used for EtherCAT redundancy, is it correct?
    Or is there any other use case for PRU_MII_RXLINK signals?

    PC-- I colleague point out to me that  this pin is also used on this board during  initialization to configure the device. These settings are described in the TRM in section 26.1.5.2.1 SYSBOOT Configuration Pins.  Just to keep in mind..

  • 0 in reply to Paula Carrillo
    Guru 15510 points
    Hi Paula,

    Thank you for the reply.

    Sorry, I want to know the use case of PRU MII RXLINK "signal".
    I know PRU MII RXLINK "pin" is multiplex pin and used as sysboot pin.

    I understood that one use case of PRU MII RXLINK "signal" is EtherCAT redundancy.
    And want to know other purpose.
    Are there other use case of PRU MII RXLINK "signal" for EtherCAT application?
    Or is it only be used to support EtherCAT redundancy and if redundancy are not used,
    PRU MII RXLINK signal doesn't need to use?

    best regards,
    g.f.
  • 0 in reply to g.f.
    TI__Mastermind 32590 points
    Hi G.f, My understanding is that you need PRU MII RXLINK for EtherCAT with and withouth redundancy. You can check below FAQ for one possible exception case:
    processors.wiki.ti.com/.../FAQ_Sitara_Industrial

    thank you,
    Paula
  • 0 in reply to Paula Carrillo
    Guru 15510 points
    Hi Paula,

    Thank you for the reply and I'm sorry for the delay.
    I understood.

    best regards,
    g.f.