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AM335x LCDC LIDD mode memclk

For the LCD controller in LIDD mode, the descriptions of the timing registers LIDD_CSx_CONF specify output timing in "memclk" cycles.  Does anyone know which clock memclk refers to?  Contenders would appear to be:
  L4_PER_CLK
  L3F_CLK
  LCD_CLK

Thanks,
Gerry