AM57x Processor Cores and Motor Control

 Hi Akash

> Do all of the processing cores (A15, C66x, M4) run from the same main memory?

The three processors have access to both on chip OCMC memory and external DDR memory. The default platform memory map for the processors when all are running RTOS is contained in C:\ti\bios_version\packages\ti\platforms\evmAM571X\Platform.xdc.

>Can we use the C66x and M4 cores as stand alone?

Yes. Each of the examples in the Processor PDK configure the specific core that is used as a master. When developing a multicore application one core will be chosen to perform the device initialization .

> Can external peripherals be connected directly to them?

For the most part yes. The M4 does not have drivers for a few of the high speed peripherals.

> Can we use the PRU-ICSS as simple motor control units?

The AM571x PRUs have the same features as the AM437x PRUs which would permit them to support Sigma Delta filtering and EnDAT master interface. In the AM437x motor control example the ARM performs the FOC calculations. This is described on http://www.ti.com/tool/TIDEP0025.

Technically the AM571x ARM and PRU could support a similar example. However at present there is not an motor control example available on the AM571x.

The AM572x PRUs do not have the features to support Sigma Delta filtering and EnDAT master interface. 

>What support is available for 3 phase motor control?

In the SYBIOS Industrial SDK for the AMR43x there is a motor control example of a three-phase field oriented control (FOC) for a single permanent-magnet synchronous motor using the AM437x on chip ADC for current measurement and the EnDAT position encoder. It is important to mention that the AM571x does not have an on device ADC for current measurement.  As mentioned earlier, the motor control example is not available on the AM571x.

David

A15, C66x and M4 run from the same main memory that can be partitioned like any other resource available on the device. All these cores have internal RAM along with OCMC (on chip shared memory controller)  and DDR memory to run code or load data into.

the TI RTOS based examples in the SDK uses the AM57x platform definition defined in SYSBIOS package. This platform memory map  is usually used by all examples in the SDK to load core specific code to certain section of the device. For PRocessor SDK RTOS the following memory map is used by all the Platform driver examples :

You can locate this in the bios_6_4x_x_x/packages/ti/platforms/evmAM57xx/Platform.xdc file. For baremetal examples included in CSL package, you can locate the memory map in the .cmd or .lds files that provide the memory section defintion that gets used by the linker when creating the application executable.

Yes, you can use as C66x and M4 as standalone if they are performing independent functions and don`t need to communicate with each other. However when you put together the system, you need to have the ARM to be configured as the boot master and will need to perform all chip level initilaization like clock configuration, DDR configurations, pinmux configuration to be done by the master core. After this the slave cores C66x and M4 can run independently as long as they don`t access the same resources.

Yes, PRU-ICSS cores are capable of performing motor control operations and our Industrial SDK offering will provide ICSS code for motor and motion control functions similar to AM437x and AM335x offering.

Regards,

Rahul 

Hi Akash

> I am a bit confused on your responses regarding motor control on the AM57x. They don't seem to quite align, can you reiterate the motor control availability on the AM57x family?

I apologize if I was unclear. There is no motor control software presently available for the AM571x  family. 

> Also, what is the difference in the PRUs that would allow the AM571x to support the Sigma Delta filtering and EnDAT master interface but not the AM572x?

The Technical reference manuals contain the detailed description of the features of each device. In the AM571x TRM, AM571x Sitara Processor Technical Reference Manual (Rev. C) Chapter 30  Programmable Real-Time Unit Subsystem and Industrial Communication Subsystem contains descriptions for Asynchronous capture [Serial Capture Unit (SCU)] with EnDat 2.2 protocol and Sigma-Delta demodulation support features. These are highlighted in subsection 30.1.1 PRU-ICSS Key Features.

The AM572x TRM AM572x Sitara Processor Technical Reference Manual (Rev. G) Chapter 30  Programmable Real-Time Unit Subsystem and Industrial Communication Subsystem does not include these features.

David