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Linux/AM5728: PCIe reference clock configuration

Part Number: AM5728

Tool/software: Linux

There is an external clk source for PCIe ref clk in AM5728 GP EVM.
I am using MLO, U-boot and rootfs obtained from Linux SDK v.03.02. for the EVM board.
when I use 'lspci' command in linux console it is giving the following message.
00:00.0 PCI bridge: Texas Instruments Device 8888 (rev 01)

Hi All,

After reading the CTRL_CORE_SMA_SW_6 register I am getting the following message.

root@am57xx-evm:~# devmem2 0x4a003c14 w
/dev/mem opened.
Memory mapped at address 0xb6f44000.
Read at address 0x4A003C14 (0xb6f44c14): 0x00000000

I have gone through the TRm and found the following statement in Table 18-1777. CTRL_CORE_SMA_SW_6:

17:16 PCIE_TX_RX_CONTROL PCIe RX and TX control of ACSPCIe.
0x0: ACSPCIe Power Down Mode
0x1: ACSPCIe TX Mode
0x2: ACSPCIe RX Mode
0x3: Reserved

So, as per TRM the CTRL_CORE_SMA_SW_6 register value at (17:16) bits position should be 0x2 as the PCIe ref clk in EVM is input.

Can anyone give some idea regarding this behaviour?

Thanks

Srikanta

  • Can you clarify what exactly is your question?
  • Hi, Srikanta,

    Linux does not have ACSPCIE buffer enabled. That means APLL_PCIE is taking DPLL_PCIE_REF output directly. DPLL_PCIE_REF is source off sys_clk1. Therefore, the read is 0.

    Rex
  • Hi Rex,

    Thanks a lot for your response.

    As per TRM we know that in transmission mode the ACSPCIE reference clock buffer receives CMOS single-ended clock CLKREF_ADPLL at it's input pin from DPLL_PCIE_REF and converts it to HCSL differential-ended output ljcb_clkp and ljcb_clkn. To make it transmission mode I have written 0x10000 to the 'CTRL_CORE_SMA_SW_6' register(at the address 0x4A003C14) in u-boot.

    I have also read this register from Linux user space and got the following message:

    root@am57xx-evm:~# devmem2 0x4a003c14 w
    /dev/mem opened.
    Memory mapped at address 0xb6fa5000.
    Read at address 0x4A003C14 (0xb6fa5c14): 0x00010000

    From above message we can say that ACSPCIE reference clock buffer is in transmission mode but. But I am not getting any clk signal from ljcb_clkp and ljcb_clkn pins.

    Can you tell me why I am not getting any clock after setting it in transmission mode?

    I am probing the clk pins after disconnecting the external clk source.

    Thanks

    Srikanta