Tool/software: Code Composer Studio
In AM572x_dap_startup.gel, function dpll_dbgss_config_board is called by OnTargetConnect. In that function there are statements like this one:
DEBUGSS_CFGBUS_PLLCTRL_PLL_CONFIGURATION1@data = 0x2483B612 ;
which writes to address 0x8003180C, according to the #defines in that file. By the L3 memory map in the TRM, this would be a DDR address, which it clearly is not. What is that address, and how can it be accessed? I haven't found any explanation of the Debug Subsytem DPLL in the AM572x TRM, nor any references to that address. Can you clarify, and/or point me to the appropriate documentation?
Thanks
--Don
