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Linux/TMDSEVM572X: I2C timeout error while streaming

Part Number: TMDSEVM572X
Other Parts Discussed in Thread: AM5718, AM5728

Tool/software: Linux

Hi,

I am using TMDSEVM572x camera module with AM572x Evaluation Module. I am not using LCD module and directly placing camera module to P16 header EVM. 

I did the pinmux configuration accordingly.

I am able to load the i2c driver. Please find the log.

The result of following commands are-

lsmod mt9t11x
mt9t11x 14769 1


v4l2-ctl --list-devices
wbcap (platform:omapwb-cap):
/dev/video11

omapwb-m2m (platform:omapwb-m2m):
/dev/video10

vip (platform:vip):
/dev/video1

vpe (platform:vpe):
/dev/video0


dmesg |grep mt9t11x
[ 8.891174] mt9t11x 4-003c: input-clock-freq: 32000000
[ 8.896338] mt9t11x 4-003c: pixel-clock-freq: 96000000
[ 8.902394] mt9t11x 4-003c: GPIO lookup for consumer reset
[ 8.902402] mt9t11x 4-003c: using device tree for GPIO lookup
[ 8.902465] of_get_named_gpiod_flags: parsed 'reset-gpios' property of node '/ocp/i2c@4807c000/mt9t11x@3C[0]' - status (0)
[ 8.902484] mt9t11x 4-003c: GPIO lookup for consumer powerdown
[ 8.902492] mt9t11x 4-003c: using device tree for GPIO lookup
[ 8.902515] of_get_named_gpiod_flags: parsed 'powerdown-gpios' property of node '/ocp/i2c@4807c000/mt9t11x@3C[0]' - status (0)
[ 8.902531] mt9t11x 4-003c: GPIO lookup for consumer oscen
[ 8.902539] mt9t11x 4-003c: using device tree for GPIO lookup
[ 8.902562] of_get_named_gpiod_flags: parsed 'oscen-gpios' property of node '/ocp/i2c@4807c000/mt9t11x@3C[0]' - status (0)
[ 8.902577] mt9t11x 4-003c: GPIO lookup for consumer bufen
[ 8.902583] mt9t11x 4-003c: using device tree for GPIO lookup
[ 8.902600] of_get_named_gpiod_flags: parsed 'bufen-gpios' property of node '/ocp/i2c@4807c000/mt9t11x@3C[0]' - status (0)
[ 8.902613] mt9t11x 4-003c: GPIO lookup for consumer camen
[ 8.902618] mt9t11x 4-003c: using device tree for GPIO lookup
[ 8.902635] of_get_named_gpiod_flags: parsed 'camen-gpios' property of node '/ocp/i2c@4807c000/mt9t11x@3C[0]' - status (0)
[ 8.957907] mt9t11x 4-003c: mt9t111 chip ID 2680
[ 8.964024] mt9t11x 4-003c: mt9t11x sensor driver registered !!
[ 11.537880] vip2-s0: Port A: Using subdev mt9t11x for capture

gst-launch-1.0 v4l2src device=/dev/video1 num-buffers=1000 io-mode=4 ! 'video/x-raw,format=(string)YUY2, width=(int)640, height=(int)480' ! vpe num-input-buffers=8 ! queue ! fakesink
Setting pipeline to PAUSED ...
Pipeline is live and does not need PREROLL ...
Setting pipeline to PLAYING ...
New clock: GstSystemClock
ERROR: from element /GstPipeline:pipeline0/GstV4l2Src:v4l2src0: Could not read from resource.
Additional debug info:
../../../gst-plugins-good-1.6.3/sys/v4l2/gstv4l2bufferpool.c(1055): gst_v4l2_buffer_pool_poll (): /GstPipeline:pipeline0/GstV4l2Src:v4l2src0:
poll error 1: Remote I/O error (121)
Execution ended after 0:00:05.083971472
Setting pipeline to PAUSED ...
Setting pipeline to READY ...

(gst-launch-1.0:1084): GStreamer-CRITICAL **: gst_mini_object_unref: assertion 'mini_object->refcount > 0' failed
Setting pipeline to NULL ...
Freeing pipeline ...

After that i got error as "Controller timed out"


dmesg
2:1.0/0003:0461:4D81.0003/input/input2
[ 15.219167] hid-generic 0003:0461:4D81.0003: input: USB HID v1.11 Mouse [USB Optical Mouse] on usb-xhci-hcd.1.auto-1.2/input0
[ 16.076309] cpsw 48484000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx
[ 16.084226] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
[ 20.708104] rtc-ds1307 2-006f: write secs=56, mins=25, hours=11, mday=11, mon=4, year=117, wday=4
[ 20.708120] rtc-ds1307 2-006f: write: d6 25 11 0d 11 05 17
[ 20.708799] rtc-ds1307 2-006f: read: d6 25 11 2d 11 05 17
[ 20.708815] rtc-ds1307 2-006f: read secs=56, mins=25, hours=11, mday=11, mon=4, year=117, wday=4
[ 24.044977] omap_hwmod: mmu1_dsp1: _wait_target_disable failed
[ 24.057772] omap_hwmod: mmu0_dsp1: _wait_target_disable failed
[ 24.084723] omap_hwmod: mmu1_dsp2: _wait_target_disable failed
[ 24.098515] omap_hwmod: mmu0_dsp2: _wait_target_disable failed
[ 303.844385] EXT4-fs (mmcblk0p2): error count since last fsck: 1
[ 303.850337] EXT4-fs (mmcblk0p2): initial error at time 1493976321: __ext4_get_inode_loc:4094: inode 43501: block 164490
[ 303.861222] EXT4-fs (mmcblk0p2): last error at time 1493976321: __ext4_get_inode_loc:4094: inode 43501: block 164490
[ 304.406568] omap_i2c 4807c000.i2c: Arbitration lost
[ 305.824434] omap_i2c 4807c000.i2c: controller timed out
[ 306.874437] omap_i2c 4807c000.i2c: controller timed out
[ 307.924466] omap_i2c 4807c000.i2c: controller timed out
[ 308.974465] omap_i2c 4807c000.i2c: controller timed out

Please guide me what i need to do more.log_camera.zip

Thanks.

  • The software team have been notified. They will respond here.
  • Did you try yavta to verify video capture -

    yavta -c60 -fYUYV -Fvout_640x480_yuyv.yuv -s640x480 /dev/video1

     

  • Hi Manisha,

    Thanks for reply.

    I tried yavta and got following result-

    Device /dev/video1 opened.
    Device `vip' on `platform:vip' is a video output (without mplanes) device.
    Video format set: YUYV (56595559) 640x480 (stride 1280) field none buffer size 614400
    Video format: YUYV (56595559) 640x480 (stride 1280) field none buffer size 614400
    8 buffers requested.
    length: 614400 offset: 0 timestamp type/source: mono/EoF
    Buffer 0/0 mapped at address 0xb6d7b000.
    length: 614400 offset: 614400 timestamp type/source: mono/EoF
    Buffer 1/0 mapped at address 0xb6ce5000.
    length: 614400 offset: 1228800 timestamp type/source: mono/EoF
    Buffer 2/0 mapped at address 0xb6c4f000.
    length: 614400 offset: 1843200 timestamp type/source: mono/EoF
    Buffer 3/0 mapped at address 0xb6bb9000.
    length: 614400 offset: 2457600 timestamp type/source: mono/EoF
    Buffer 4/0 mapped at address 0xb6b23000.
    length: 614400 offset: 3072000 timestamp type/source: mono/EoF
    Buffer 5/0 mapped at address 0xb6a8d000.
    length: 614400 offset: 3686400 timestamp type/source: mono/EoF
    Buffer 6/0 mapped at address 0xb69f7000.
    length: 614400 offset: 4300800 timestamp type/source: mono/EoF
    Buffer 7/0 mapped at address 0xb6961000.
    Unable to start streaming: Remote I/O error (121).
    8 buffers released.

  • Also sometime it shows error-
    Unable to start streaming: Connection timed out (110).
  • Hi,

    Any update?

  • Hi,

    I also want to add that i am suspecting  the issue can be also with the pinmux configuration of the 5 GPIOs that are being used with the Camera Module. As i have changed those GPIOs for new pin configuration, I am doing changes only with two files -

    1) "mux_data.h"........... located in board-support/u-boot-2016.05+gitAUTOINC+4db46a6bbd-g4db46a6bbd/board/ti/am57xx

    2) "am57xx-beagle-x15-common.dtsi"............. located in board-support/linux-4.4.41+gitAUTOINC+f9f6f0db2d-gf9f6f0db2d/arch/arm/boot/dts.

    MCASP1_AXR8 is replaced with GPMC_AD12.

    MCASP1_AXR9 is replaced with GPMC_AD13.

    MCASP1_AXR10 is replaced with GPMC_AD14.

    MCASP1_AXR11 is replaced with GPMC_AD15.

    GPIO6_11 is replaced with GPMC_A13.

    Can you please suggest me that if any other file is there to be configured for GPIO configuration?

    attaching mux_data.h, am57xx-beagle-x15-common.dtsi.

    am57xx-beagle-x15-common.txt
    /*
     * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
     *
     * This program is free software; you can redistribute it and/or modify
     * it under the terms of the GNU General Public License version 2 as
     * published by the Free Software Foundation.
     */
    /dts-v1/;
    
    #include "dra74x.dtsi"
    #include <dt-bindings/gpio/gpio.h>
    #include <dt-bindings/interrupt-controller/irq.h>
    
    / {
    	model = "TI AM5728 BeagleBoard-X15";
    	compatible = "ti,am572x-beagle-x15", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
    
    	aliases {
    		rtc0 = &mcp_rtc;
    		rtc1 = &tps659038_rtc;
    		rtc2 = &rtc;
    		display0 = &hdmi0;
    
    		sound0 = &sound0;
    		sound1 = &hdmi;
    	};
    
    	memory {
    		device_type = "memory";
    		reg = <0x0 0x80000000 0x0 0x80000000>;
    	};
    
    	reserved-memory {
    		#address-cells = <2>;
    		#size-cells = <2>;
    		ranges;
    
    		ipu2_cma_pool: ipu2_cma@95800000 {
    			compatible = "shared-dma-pool";
    			reg = <0x0 0x95800000 0x0 0x3800000>;
    			reusable;
    			status = "okay";
    		};
    
    		dsp1_cma_pool: dsp1_cma@99000000 {
    			compatible = "shared-dma-pool";
    			reg = <0x0 0x99000000 0x0 0x4000000>;
    			reusable;
    			status = "okay";
    		};
    
    		ipu1_cma_pool: ipu1_cma@9d000000 {
    			compatible = "shared-dma-pool";
    			reg = <0x0 0x9d000000 0x0 0x2000000>;
    			reusable;
    			status = "okay";
    		};
    
    		dsp2_cma_pool: dsp2_cma@9f000000 {
    			compatible = "shared-dma-pool";
    			reg = <0x0 0x9f000000 0x0 0x800000>;
    			reusable;
    			status = "okay";
    		};
    	};
    
    	vdd_3v3: fixedregulator-vdd_3v3 {
    		compatible = "regulator-fixed";
    		regulator-name = "vdd_3v3";
    		vin-supply = <&regen1>;
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    	};
    
    	aic_dvdd: fixedregulator-aic_dvdd {
    		compatible = "regulator-fixed";
    		regulator-name = "aic_dvdd_fixed";
    		vin-supply = <&vdd_3v3>;
    		regulator-min-microvolt = <1800000>;
    		regulator-max-microvolt = <1800000>;
    	};
    
    	vtt_fixed: fixedregulator-vtt {
    		/* TPS51200 */
    		compatible = "regulator-fixed";
    		regulator-name = "vtt_fixed";
    		vin-supply = <&smps3_reg>;
    		regulator-min-microvolt = <3300000>;
    		regulator-max-microvolt = <3300000>;
    		regulator-always-on;
    		regulator-boot-on;
    		enable-active-high;
    		gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
    	};
    
    	leds {
    		compatible = "gpio-leds";
    		led@0 {
    			label = "beagle-x15:usr0";
    			gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>;
    			linux,default-trigger = "heartbeat";
    			default-state = "off";
    		};
    
    		led@1 {
    			label = "beagle-x15:usr1";
    			gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
    			linux,default-trigger = "cpu0";
    			default-state = "off";
    		};
    
    		led@2 {
    			label = "beagle-x15:usr2";
    			gpios = <&gpio7 14 GPIO_ACTIVE_HIGH>;
    			linux,default-trigger = "mmc0";
    			default-state = "off";
    		};
    
    		led@3 {
    			label = "beagle-x15:usr3";
    			gpios = <&gpio7 15 GPIO_ACTIVE_HIGH>;
    			linux,default-trigger = "ide-disk";
    			default-state = "off";
    		};
    	};
    
    	gpio_fan: gpio_fan {
    		/* Based on 5v 500mA AFB02505HHB */
    		compatible = "gpio-fan";
    		gpios =  <&tps659038_gpio 2 GPIO_ACTIVE_HIGH>;
    		gpio-fan,speed-map = <0     0>,
    				     <13000 1>;
    		#cooling-cells = <2>;
    	};
    
    	hdmi0: connector {
    		compatible = "hdmi-connector";
    		label = "hdmi";
    
    		type = "a";
    
    		port {
    			hdmi_connector_in: endpoint {
    				remote-endpoint = <&tpd12s015_out>;
    			};
    		};
    	};
    
    	tpd12s015: encoder {
    		compatible = "ti,tpd12s015";
    
    		gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>,	/* gpio7_10, CT CP HPD */
    			<&gpio6 28 GPIO_ACTIVE_HIGH>,	/* gpio6_28, LS OE */
    			<&gpio7 12 GPIO_ACTIVE_HIGH>;	/* gpio7_12/sp1_cs2, HPD */
    
    		ports {
    			#address-cells = <1>;
    			#size-cells = <0>;
    
    			port@0 {
    				reg = <0>;
    
    				tpd12s015_in: endpoint {
    					remote-endpoint = <&hdmi_out>;
    				};
    			};
    
    			port@1 {
    				reg = <1>;
    
    				tpd12s015_out: endpoint {
    					remote-endpoint = <&hdmi_connector_in>;
    				};
    			};
    		};
    	};
    
    	sound0: sound@0 {
    		compatible = "simple-audio-card";
    		simple-audio-card,name = "BeagleBoard-X15";
    		simple-audio-card,widgets =
    			"Line", "Line Out",
    			"Line", "Line In";
    		simple-audio-card,routing =
    			"Line Out",	"LLOUT",
    			"Line Out",	"RLOUT",
    			"MIC2L",	"Line In",
    			"MIC2R",	"Line In";
    		simple-audio-card,format = "dsp_b";
    		simple-audio-card,bitclock-master = <&sound0_master>;
    		simple-audio-card,frame-master = <&sound0_master>;
    		simple-audio-card,bitclock-inversion;
    
    		simple-audio-card,cpu {
    			sound-dai = <&mcasp3>;
    		};
    
    		sound0_master: simple-audio-card,codec {
    			sound-dai = <&tlv320aic3104>;
    			clocks = <&clkout2_clk>;
    		};
    	};
    };
    
    &i2c1 {
    	status = "okay";
    	clock-frequency = <400000>;
    
    	tps659038: tps659038@58 {
    		compatible = "ti,tps659038";
    		reg = <0x58>;
    		interrupt-parent = <&gpio1>;
    		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
    
    		#interrupt-cells = <2>;
    		interrupt-controller;
    
    		ti,system-power-controller;
    		ti,palmas-override-powerhold;
    
    		tps659038_pmic {
    			compatible = "ti,tps659038-pmic";
    
    			regulators {
    				smps12_reg: smps12 {
    					/* VDD_MPU */
    					regulator-name = "smps12";
    					regulator-min-microvolt = < 850000>;
    					regulator-max-microvolt = <1250000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				smps3_reg: smps3 {
    					/* VDD_DDR */
    					regulator-name = "smps3";
    					regulator-min-microvolt = <1350000>;
    					regulator-max-microvolt = <1350000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				smps45_reg: smps45 {
    					/* VDD_DSPEVE, VDD_IVA, VDD_GPU */
    					regulator-name = "smps45";
    					regulator-min-microvolt = < 850000>;
    					regulator-max-microvolt = <1250000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				smps6_reg: smps6 {
    					/* VDD_CORE */
    					regulator-name = "smps6";
    					regulator-min-microvolt = <850000>;
    					regulator-max-microvolt = <1150000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				/* SMPS7 unused */
    
    				smps8_reg: smps8 {
    					/* VDD_1V8 */
    					regulator-name = "smps8";
    					regulator-min-microvolt = <1800000>;
    					regulator-max-microvolt = <1800000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				/* SMPS9 unused */
    
    				ldo1_reg: ldo1 {
    					/* VDD_SD / VDDSHV8  */
    					regulator-name = "ldo1";
    					regulator-min-microvolt = <1800000>;
    					regulator-max-microvolt = <3300000>;
    					regulator-boot-on;
    					regulator-always-on;
    				};
    
    				ldo2_reg: ldo2 {
    					/* VDD_SHV5 */
    					regulator-name = "ldo2";
    					regulator-min-microvolt = <3300000>;
    					regulator-max-microvolt = <3300000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				ldo3_reg: ldo3 {
    					/* VDDA_1V8_PHYA */
    					regulator-name = "ldo3";
    					regulator-min-microvolt = <1800000>;
    					regulator-max-microvolt = <1800000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				ldo4_reg: ldo4 {
    					/* VDDA_1V8_PHYB */
    					regulator-name = "ldo4";
    					regulator-min-microvolt = <1800000>;
    					regulator-max-microvolt = <1800000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				ldo9_reg: ldo9 {
    					/* VDD_RTC */
    					regulator-name = "ldo9";
    					regulator-min-microvolt = <1050000>;
    					regulator-max-microvolt = <1050000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				ldoln_reg: ldoln {
    					/* VDDA_1V8_PLL */
    					regulator-name = "ldoln";
    					regulator-min-microvolt = <1800000>;
    					regulator-max-microvolt = <1800000>;
    					regulator-always-on;
    					regulator-boot-on;
    				};
    
    				ldousb_reg: ldousb {
    					/* VDDA_3V_USB: VDDA_USBHS33 */
    					regulator-name = "ldousb";
    					regulator-min-microvolt = <3300000>;
    					regulator-max-microvolt = <3300000>;
    					regulator-boot-on;
    				};
    
    				regen1: regen1 {
    					/* VDD_3V3_ON */
    					regulator-name = "regen1";
    					regulator-boot-on;
    					regulator-always-on;
    				};
    			};
    		};
    
    		tps659038_rtc: tps659038_rtc {
    			compatible = "ti,palmas-rtc";
    			interrupt-parent = <&tps659038>;
    			interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
    			wakeup-source;
    		};
    
    		tps659038_pwr_button: tps659038_pwr_button {
    			compatible = "ti,palmas-pwrbutton";
    			interrupt-parent = <&tps659038>;
    			interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
    			wakeup-source;
    			ti,palmas-long-press-seconds = <12>;
    		};
    
    		tps659038_gpio: tps659038_gpio {
    			compatible = "ti,palmas-gpio";
    			gpio-controller;
    			#gpio-cells = <2>;
    		};
    
    		extcon_usb2: tps659038_usb {
    			compatible = "ti,palmas-usb-vid";
    			ti,enable-vbus-detection;
    			vbus-gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
    		};
    
    	};
    
    	tmp102: tmp102@48 {
    		compatible = "ti,tmp102";
    		reg = <0x48>;
    		interrupt-parent = <&gpio7>;
    		interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
    		#thermal-sensor-cells = <1>;
    	};
    
    	tlv320aic3104: tlv320aic3104@18 {
    		#sound-dai-cells = <0>;
    		compatible = "ti,tlv320aic3104";
    		reg = <0x18>;
    
    		assigned-clocks = <&clkoutmux2_clk_mux>;
    		assigned-clock-parents = <&sys_clk2_dclk_div>;
    
    		adc-settle-ms = <40>;
    		AVDD-supply = <&vdd_3v3>;
    		IOVDD-supply = <&vdd_3v3>;
    		DRVDD-supply = <&vdd_3v3>;
    		DVDD-supply = <&aic_dvdd>;
    
    		status = "okay";
    	};
    };
    
    &dra7_pmx_core {
    	mmc1_pins_default: mmc1_pins_default {
    		pinctrl-single,pins = <
    			DRA7XX_CORE_IOPAD(0x3754, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc1_clk.clk */
    			DRA7XX_CORE_IOPAD(0x3758, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc1_cmd.cmd */
    			DRA7XX_CORE_IOPAD(0x375c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc1_dat0.dat0 */
    			DRA7XX_CORE_IOPAD(0x3760, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc1_dat1.dat1 */
    			DRA7XX_CORE_IOPAD(0x3764, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc1_dat2.dat2 */
    			DRA7XX_CORE_IOPAD(0x3768, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc1_dat3.dat3 */
    		>;
    	};
    
    	mmc2_pins_default: mmc2_pins_default {
    		pinctrl-single,pins = <
    			DRA7XX_CORE_IOPAD(0x349c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a23.mmc2_clk */
    			DRA7XX_CORE_IOPAD(0x34b0, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_cs1.mmc2_cmd */
    			DRA7XX_CORE_IOPAD(0x34a0, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a24.mmc2_dat0 */
    			DRA7XX_CORE_IOPAD(0x34a4, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a25.mmc2_dat1 */
    			DRA7XX_CORE_IOPAD(0x34a8, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a26.mmc2_dat2 */
    			DRA7XX_CORE_IOPAD(0x34ac, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a27.mmc2_dat3 */
    			DRA7XX_CORE_IOPAD(0x348c, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a19.mmc2_dat4 */
    			DRA7XX_CORE_IOPAD(0x3490, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a20.mmc2_dat5 */
    			DRA7XX_CORE_IOPAD(0x3494, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a21.mmc2_dat6 */
    			DRA7XX_CORE_IOPAD(0x3498, (PIN_INPUT_PULLUP | MUX_MODE1)) /* gpmc_a22.mmc2_dat7 */
    		>;
    	};
    
            // New Changes Aptina cam module
            i2c5_pins_default: i2c5_pins_default {
                    pinctrl-single,pins = <
                            0x50 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a4.i2c5_sda TRM 4226 new method*/
                            0x54 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a5.i2c5_scl */
    
                    >;
            };
    
    };
    
    &mmc1 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&mmc1_pins_default>;
    };
    
    &mmc2 {
    	pinctrl-names = "default";
    	pinctrl-0 = <&mmc2_pins_default>;
    };
    
    &i2c3 {
    	status = "okay";
    	clock-frequency = <400000>;
    
    	mcp_rtc: rtc@6f {
    		compatible = "microchip,mcp7941x";
    		reg = <0x6f>;
    		interrupts-extended = <&crossbar_mpu GIC_SPI 2 IRQ_TYPE_EDGE_RISING>,
    				      <&dra7_pmx_core 0x424>;
    		interrupt-names = "irq", "wakeup";
    
    		vcc-supply = <&vdd_3v3>;
    		wakeup-source;
    	};
    };
    
    
    &i2c5 {
            status = "okay";
            pinctrl-names = "default";
            pinctrl-0 = <&i2c5_pins_default>;
            clock-frequency = <400000>;
            mt9t11x@3C {
                    compatible = "aptina,mt9t111";
                    reg = <0x3C>;
    
                    //Original definitions
                    //reset-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>;
                    //oscen-gpios = <&gpio5 10 GPIO_ACTIVE_HIGH>;
                    //powerdown-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
                    //bufen-gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
                    //camen-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
    
    
                    //New Definitaions 
                    reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
                    oscen-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
                    powerdown-gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
                    bufen-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
                    camen-gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
                    port {
                            cam: endpoint {
                                    remote-endpoint = <&vin3a>;
                                    hsync-active = <1>;
                                    vsync-active = <1>;
                                    pclk-sample = <0>;
                                    input-clock-freq = <32000000>;
                                    pixel-clock-freq = <96000000>;
                            };
                    };
            };
    };
    
    
    /*
    &i2c5 {
            status = "okay";
            pinctrl-names = "default";
            pinctrl-0 = <&i2c5_pins_default>;
            clock-frequency = <400000>;
            ovcamera@30 {
                    compatible = "ovti,ov10635";
                    reg = <0x30>;
                    //mux-gpios = <&pcf_hdmi 3    GPIO_ACTIVE_LOW>;
                    port {
                            cam: endpoint {
                                    remote-endpoint = <&vin3a>;
                                    hsync-active = <1>;
                                    vsync-active = <1>;
                                    pclk-sample = <1>;
                            };
                       };
                    };
    
    };
    */
    
    &vip2 {
            status = "okay";
    };
    
    &vin3a {
            status = "okay";
            endpoint {
                    slave-mode;
                    remote-endpoint = <&cam>;
            };
    };
    
    
    
    &gpio7 {
    	ti,no-reset-on-init;
    	ti,no-idle-on-init;
    };
    
    &uart3 {
    	status = "okay";
    	interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
    			      <&dra7_pmx_core 0x3f8>;
    };
    
    &mac {
    	status = "okay";
    	dual_emac;
    };
    
    &cpsw_emac0 {
    	phy_id = <&davinci_mdio>, <1>;
    	phy-mode = "rgmii";
    	dual_emac_res_vlan = <1>;
    };
    
    &cpsw_emac1 {
    	phy_id = <&davinci_mdio>, <2>;
    	phy-mode = "rgmii";
    	dual_emac_res_vlan = <2>;
    };
    
    &mmc1 {
    	status = "okay";
    
    	vmmc-supply = <&ldo1_reg>;
    	bus-width = <4>;
    	cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
    };
    
    &mmc2 {
    	status = "okay";
    
    	vmmc-supply = <&vdd_3v3>;
    	bus-width = <8>;
    	ti,non-removable;
    	cap-mmc-dual-data-rate;
    };
    
    &sata {
    	status = "okay";
    };
    
    &usb2_phy1 {
    	phy-supply = <&ldousb_reg>;
    };
    
    &usb2_phy2 {
    	phy-supply = <&ldousb_reg>;
    };
    
    &usb1 {
    	dr_mode = "host";
    };
    
    &omap_dwc3_2 {
    	extcon = <&extcon_usb2>;
    };
    
    &usb2 {
    	/*
    	 * Stand alone usage is peripheral only.
    	 * However, with some resistor modifications
    	 * this port can be used via expansion connectors
    	 * as "host" or "dual-role". If so, provide
    	 * the necessary dr_mode override in the expansion
    	 * board's DT.
    	 */
    	dr_mode = "peripheral";
    };
    
    &cpu_trips {
    	cpu_alert1: cpu_alert1 {
    		temperature = <50000>; /* millicelsius */
    		hysteresis = <2000>; /* millicelsius */
    		type = "active";
    	};
    };
    
    &cpu_cooling_maps {
    	map1 {
    		trip = <&cpu_alert1>;
    		cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
    	};
    };
    
    &thermal_zones {
    	board_thermal: board_thermal {
    		polling-delay-passive = <1250>; /* milliseconds */
    		polling-delay = <1500>; /* milliseconds */
    
    				/* sensor       ID */
    		thermal-sensors = <&tmp102     0>;
    
    		board_trips: trips {
    			board_alert0: board_alert {
    				temperature = <40000>; /* millicelsius */
    				hysteresis = <2000>; /* millicelsius */
    				type = "active";
    			};
    
    			board_crit: board_crit {
    				temperature = <105000>; /* millicelsius */
    				hysteresis = <0>; /* millicelsius */
    				type = "critical";
    			};
    		};
    
    		board_cooling_maps: cooling-maps {
    			map0 {
    				trip = <&board_alert0>;
    				cooling-device =
    				  <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
    			};
    		};
           };
    };
    
    &oppdm_mpu {
    	vdd-supply = <&smps12_reg>;
    };
    
    &oppdm_dspeve {
    	vdd-supply = <&smps45_reg>;
    };
    
    &oppdm_gpu {
    	vdd-supply = <&smps45_reg>;
    };
    
    &oppdm_ivahd {
    	vdd-supply = <&smps45_reg>;
    };
    
    &oppdm_core {
    	vdd-supply = <&smps6_reg>;
    };
    
    &dss {
    	status = "ok";
    
    	vdda_video-supply = <&ldoln_reg>;
    };
    
    &bb2d {
    	status = "okay";
    };
    
    &hdmi {
    	status = "ok";
    	vdda-supply = <&ldo4_reg>;
    
    	port {
    		hdmi_out: endpoint {
    			remote-endpoint = <&tpd12s015_in>;
    		};
    	};
    };
    
    &mcasp3 {
    	#sound-dai-cells = <0>;
    	assigned-clocks = <&mcasp3_ahclkx_mux>;
    	assigned-clock-parents = <&sys_clkin2>;
    	status = "okay";
    
    	op-mode = <0>;	/* MCASP_IIS_MODE */
    	tdm-slots = <2>;
    	/* 4 serializers */
    	serial-dir = <	/* 0: INACTIVE, 1: TX, 2: RX */
    		1 2 0 0
    	>;
    	tx-num-evt = <32>;
    	rx-num-evt = <32>;
    };
    
    &mailbox3 {
    	status = "okay";
    	mbox_pru1_0: mbox_pru1_0 {
    		status = "okay";
    	};
    	mbox_pru1_1: mbox_pru1_1 {
    		status = "okay";
    	};
    };
    
    &mailbox4 {
    	status = "okay";
    	mbox_pru2_0: mbox_pru2_0 {
    		status = "okay";
    	};
    	mbox_pru2_1: mbox_pru2_1 {
    		status = "okay";
    	};
    };
    
    &mailbox5 {
    	status = "okay";
    	mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
    		status = "okay";
    	};
    	mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
    		status = "okay";
    	};
    };
    
    &mailbox6 {
    	status = "okay";
    	mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
    		status = "okay";
    	};
    	mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
    		status = "okay";
    	};
    };
    
    &mmu0_dsp1 {
    	status = "okay";
    };
    
    &mmu1_dsp1 {
    	status = "okay";
    };
    
    &mmu0_dsp2 {
    	status = "okay";
    };
    
    &mmu1_dsp2 {
    	status = "okay";
    };
    
    &mmu_ipu1 {
    	status = "okay";
    };
    
    &mmu_ipu2 {
    	status = "okay";
    };
    
    &ipu2 {
    	status = "okay";
    	memory-region = <&ipu2_cma_pool>;
    	mboxes = <&mailbox6 &mbox_ipu2_ipc3x>;
    	timers = <&timer3>;
    	watchdog-timers = <&timer4>, <&timer9>;
    };
    
    &ipu1 {
    	status = "okay";
    	memory-region = <&ipu1_cma_pool>;
    	mboxes = <&mailbox5 &mbox_ipu1_ipc3x>;
    	timers = <&timer11>;
    };
    
    &dsp1 {
    	status = "okay";
    	memory-region = <&dsp1_cma_pool>;
    	mboxes = <&mailbox5 &mbox_dsp1_ipc3x>;
    	timers = <&timer5>;
    };
    
    &dsp2 {
    	status = "okay";
    	memory-region = <&dsp2_cma_pool>;
    	mboxes = <&mailbox6 &mbox_dsp2_ipc3x>;
    	timers = <&timer6>;
    };
    
    &pruss1 {
    	status = "okay";
    	pru1_0: pru0@4b234000 {
    		interrupt-parent = <&pruss1_intc>;
    		interrupts = <16>, <17>;
    		interrupt-names = "vring", "kick";
    		status = "okay";
    	};
    
    	pru1_1: pru1@4b238000 {
    		interrupt-parent = <&pruss1_intc>;
    		interrupts = <18>, <19>;
    		interrupt-names = "vring", "kick";
    		status = "okay";
    	};
    };
    
    &pruss2 {
    	status = "okay";
    	pru2_0: pru0@4b2b4000 {
    		interrupt-parent = <&pruss2_intc>;
    		interrupts = <16>, <17>;
    		interrupt-names = "vring", "kick";
    		status = "okay";
    	};
    
    	pru2_1: pru1@4b2b8000 {
    		interrupt-parent = <&pruss2_intc>;
    		interrupts = <18>, <19>;
    		interrupt-names = "vring", "kick";
    		status = "okay";
    	};
    };
    
    
    mux_data.txt
    /*
     * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com
     *
     * Author: Felipe Balbi <balbi@ti.com>
     *
     * Based on board/ti/dra7xx/evm.c
     *
     * SPDX-License-Identifier:	GPL-2.0+
     */
    #ifndef _MUX_DATA_BEAGLE_X15_H_
    #define _MUX_DATA_BEAGLE_X15_H_
    
    
    #include <asm/arch/mux_dra7xx.h>
    
    const struct pad_conf_entry core_padconf_array_essential_x15[] = {
    	{GPMC_AD0, (M2 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad0.vin3a_d0 */
    	{GPMC_AD1, (M2 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad1.vin3a_d1 */
    	{GPMC_AD2, (M2 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad2.vin3a_d2 */
    	{GPMC_AD3, (M2 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad3.vin3a_d3 */
    	{GPMC_AD4, (M2 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad4.vin3a_d4 */
    	{GPMC_AD5, (M2 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad5.vin3a_d5 */
    	{GPMC_AD6, (M2 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad6.vin3a_d6 */
    	{GPMC_AD7, (M2 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad7.vin3a_d7 */
    	{GPMC_AD8, (M2 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad8.vin3a_d8 */
    	{GPMC_AD9, (M2 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad9.vin3a_d9 */
    	{GPMC_AD10, (M2 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad10.vin3a_d10 */
    	{GPMC_AD11, (M2 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad11.vin3a_d11 */
    
    //	{GPMC_AD12, (M2 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad12.vin3a_d12 */
    //	{GPMC_AD13, (M2 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad13.vin3a_d13 */
    //	{GPMC_AD14, (M2 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad14.vin3a_d14 */
    //	{GPMC_AD15, (M2 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_ad15.vin3a_d15 */
    
          //New Gpios for Aptina Camera
            {GPMC_AD12, (M14 | PIN_OUTPUT_PULLUP)},    /* gpmc_ad12.OSC_EN gpio1_18*/
            {GPMC_AD13, (M14 | PIN_OUTPUT_PULLDOWN)},    /* gpmc_ad13.BUFF_EN gpio1_19*/
            {GPMC_AD14, (M14 | PIN_OUTPUT_PULLDOWN)},    /* gpmc_ad14.GPIO gpio1_20*/
            {GPMC_AD15, (M14 | PIN_OUTPUT_PULLDOWN)},    /* gpmc_ad15.CAM_PWR gpio1_21*/
            {GPMC_A13, (M14 | PIN_OUTPUT_PULLDOWN)}, /* gpmc_a13.gpio2_3 for Cam_En */
            //New Gpios for Aptina Camera
    
    
    //        {MCASP1_AXR8, (M14 | PIN_INPUT)},       /* mcasp1_axr8.gpio5_10 for OSC_EN */
    //        {MCASP1_AXR9, (M14 | PIN_INPUT)},       /* mcasp1_axr9.gpio5_11 for CAM_PWRDN*/
    //        {MCASP1_AXR10, (M14 | PIN_INPUT)},      /* mcasp1_axr10.gpio5_12 for BUFF_EN*/
    //        {MCASP1_AXR11, (M14 | PIN_INPUT_PULLUP)},       /* mcasp1_axr11.gpio4_17 for RESET*/
    //        {GPIO6_11, (M0 | PIN_INPUT_PULLUP)},    /* gpio6_11.gpio6_11 used for Cam_En in LCD Module*/
    
    	{GPMC_A0, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a0.vin3a_d16 */
    	{GPMC_A1, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a1.vin3a_d17 */
    	{GPMC_A2, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a2.vin3a_d18 */
    	{GPMC_A3, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a3.vin3a_d19 */
    
    //	{GPMC_A4, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a4.vin3a_d20 */
    //	{GPMC_A5, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a5.vin3a_d21 */
    
    	//New I2c at P16 Header
    	{GPMC_A4, (M7 | PIN_INPUT_PULLUP)},     /* gpmc_a4.i2c5_scl */
            {GPMC_A5, (M7 | PIN_INPUT_PULLUP)},     /* gpmc_a5.i2c5_sda */
    	//New I2C ar P16 Header
    
    
    	{GPMC_A6, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a6.vin3a_d22 */
    	{GPMC_A7, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a7.vin3a_d23 */
    	{GPMC_A8, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a8.vin3a_hsync0 */
    	{GPMC_A9, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a9.vin3a_vsync0 */
    	{GPMC_A10, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a10.vin3a_de0 */
    	{GPMC_A11, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a11.vin3a_fld0 */
    	{GPMC_A12, (M14 | PIN_INPUT_PULLUP)},	/* gpmc_a12.gpio2_2 */
    //	{GPMC_A13, (M14 | PIN_INPUT_PULLDOWN)},	/* gpmc_a13.gpio2_3 */
    	{GPMC_A14, (M14 | PIN_INPUT_PULLUP)},	/* gpmc_a14.gpio2_4 */
    	{GPMC_A15, (M14 | PIN_INPUT_PULLDOWN)},	/* gpmc_a15.gpio2_5 */
    	{GPMC_A16, (M14 | PIN_INPUT_PULLDOWN)},	/* gpmc_a16.gpio2_6 */
    	{GPMC_A17, (M14 | PIN_INPUT_PULLDOWN)},	/* gpmc_a17.gpio2_7 */
    	{GPMC_A18, (M14 | PIN_INPUT_PULLUP)},	/* gpmc_a18.gpio2_8 */
    	{GPMC_A19, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a19.mmc2_dat4 */
    	{GPMC_A20, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a20.mmc2_dat5 */
    	{GPMC_A21, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a21.mmc2_dat6 */
    	{GPMC_A22, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a22.mmc2_dat7 */
    	{GPMC_A23, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a23.mmc2_clk */
    	{GPMC_A24, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a24.mmc2_dat0 */
    	{GPMC_A25, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a25.mmc2_dat1 */
    	{GPMC_A26, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a26.mmc2_dat2 */
    	{GPMC_A27, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a27.mmc2_dat3 */
    	{GPMC_CS1, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_cs1.mmc2_cmd */
    	{GPMC_CS0, (M14 | PIN_INPUT_PULLDOWN)},	/* gpmc_cs0.gpio2_19 */
    	{GPMC_CS2, (M14 | PIN_INPUT_PULLUP)},	/* gpmc_cs2.gpio2_20 */
    	{GPMC_CS3, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_cs3.vin3a_clk0 */
    	{GPMC_CLK, (M9 | PIN_INPUT_PULLDOWN)},	/* gpmc_clk.dma_evt1 */
    	{GPMC_ADVN_ALE, (M14 | PIN_INPUT_PULLUP)},	/* gpmc_advn_ale.gpio2_23 */
    	{GPMC_OEN_REN, (M14 | PIN_INPUT_PULLUP)},	/* gpmc_oen_ren.gpio2_24 */
    	{GPMC_WEN, (M14 | PIN_INPUT_PULLUP)},	/* gpmc_wen.gpio2_25 */
    	{GPMC_BEN0, (M9 | PIN_INPUT_PULLDOWN)},	/* gpmc_ben0.dma_evt3 */
    	{GPMC_BEN1, (M9 | PIN_INPUT_PULLDOWN)},	/* gpmc_ben1.dma_evt4 */
    	{GPMC_WAIT0, (M14 | PIN_INPUT_PULLUP)},	/* gpmc_wait0.gpio2_28 */
    	{VIN1B_CLK1, (M14 | PIN_INPUT_PULLDOWN)},	/* vin1b_clk1.gpio2_31 */
    	{VIN1A_D2, (M14 | PIN_INPUT_PULLDOWN)},	/* vin1a_d2.gpio3_6 */
    	{VIN1A_D3, (M14 | PIN_INPUT_PULLDOWN)},	/* vin1a_d3.gpio3_7 */
    	{VIN1A_D4, (M14 | PIN_INPUT_PULLDOWN)},	/* vin1a_d4.gpio3_8 */
    	{VIN1A_D5, (M14 | PIN_INPUT_PULLDOWN)},	/* vin1a_d5.gpio3_9 */
    	{VIN1A_D6, (M14 | PIN_INPUT_PULLDOWN)},	/* vin1a_d6.gpio3_10 */
    	{VIN1A_D7, (M14 | PIN_INPUT_PULLDOWN)},	/* vin1a_d7.gpio3_11 */
    	{VIN1A_D8, (M14 | PIN_INPUT_PULLDOWN)},	/* vin1a_d8.gpio3_12 */
    	{VIN1A_D10, (M14 | PIN_INPUT_PULLDOWN)},	/* vin1a_d10.gpio3_14 */
    	{VIN1A_D11, (M14 | PIN_INPUT_PULLDOWN)},	/* vin1a_d11.gpio3_15 */
    	{VIN1A_D12, (M14 | PIN_INPUT_PULLDOWN)},	/* vin1a_d12.gpio3_16 */
    	{VIN1A_D14, (M14 | PIN_INPUT_PULLDOWN)},	/* vin1a_d14.gpio3_18 */
    	{VIN1A_D16, (M14 | PIN_INPUT_PULLDOWN)},	/* vin1a_d16.gpio3_20 */
    	{VIN1A_D19, (M14 | PIN_INPUT_PULLDOWN)},	/* vin1a_d19.gpio3_23 */
    	{VIN1A_D20, (M14 | PIN_INPUT_PULLDOWN)},	/* vin1a_d20.gpio3_24 */
    	{VIN1A_D22, (M14 | PIN_INPUT_PULLDOWN)},	/* vin1a_d22.gpio3_26 */
    	{VIN2A_CLK0, (M14 | PIN_INPUT_PULLDOWN)},	/* vin2a_clk0.gpio3_28 */
    	{VIN2A_DE0, (M14 | PIN_INPUT_PULLDOWN)},	/* vin2a_de0.gpio3_29 */
    	{VIN2A_FLD0, (M14 | PIN_INPUT_PULLDOWN)},	/* vin2a_fld0.gpio3_30 */
    	{VIN2A_HSYNC0, (M11 | PIN_INPUT_PULLDOWN)},	/* vin2a_hsync0.pr1_uart0_cts_n */
    	{VIN2A_VSYNC0, (M11 | PIN_OUTPUT_PULLUP)},	/* vin2a_vsync0.pr1_uart0_rts_n */
    	{VIN2A_D0, (M11 | PIN_INPUT_PULLDOWN)},	/* vin2a_d0.pr1_uart0_rxd */
    	{VIN2A_D1, (M11 | PIN_OUTPUT_PULLDOWN)},	/* vin2a_d1.pr1_uart0_txd */
    	{VIN2A_D2, (M8 | PIN_INPUT_PULLDOWN)},	/* vin2a_d2.uart10_rxd */
    	{VIN2A_D3, (M8 | PIN_OUTPUT_PULLDOWN)},	/* vin2a_d3.uart10_txd */
    	{VIN2A_D4, (M8 | PIN_INPUT_PULLDOWN)},	/* vin2a_d4.uart10_ctsn */
    	{VIN2A_D5, (M8 | PIN_OUTPUT_PULLDOWN)},	/* vin2a_d5.uart10_rtsn */
    	{VIN2A_D6, (M14 | PIN_INPUT_PULLDOWN)},	/* vin2a_d6.gpio4_7 */
    	{VIN2A_D7, (M14 | PIN_INPUT_PULLDOWN)},	/* vin2a_d7.gpio4_8 */
    	{VIN2A_D8, (M14 | PIN_INPUT_PULLDOWN)},	/* vin2a_d8.gpio4_9 */
    	{VIN2A_D9, (M14 | PIN_INPUT_PULLDOWN)},	/* vin2a_d9.gpio4_10 */
    	{VIN2A_D10, (M10 | PIN_OUTPUT_PULLDOWN)},	/* vin2a_d10.ehrpwm2B */
    	{VIN2A_D11, (M10 | PIN_INPUT_PULLDOWN)},	/* vin2a_d11.ehrpwm2_tripzone_input */
    	{VIN2A_D12, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d12.rgmii1_txc */
    	{VIN2A_D13, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d13.rgmii1_txctl */
    	{VIN2A_D14, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d14.rgmii1_txd3 */
    	{VIN2A_D15, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d15.rgmii1_txd2 */
    	{VIN2A_D16, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d16.rgmii1_txd1 */
    	{VIN2A_D17, (M3 | PIN_OUTPUT | MANUAL_MODE)},	/* vin2a_d17.rgmii1_txd0 */
    	{VIN2A_D18, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d18.rgmii1_rxc */
    	{VIN2A_D19, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d19.rgmii1_rxctl */
    	{VIN2A_D20, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d20.rgmii1_rxd3 */
    	{VIN2A_D21, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d21.rgmii1_rxd2 */
    	{VIN2A_D22, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d22.rgmii1_rxd1 */
    	{VIN2A_D23, (M3 | PIN_INPUT | MANUAL_MODE)},	/* vin2a_d23.rgmii1_rxd0 */
    	{VOUT1_CLK, (M0 | PIN_OUTPUT)},	/* vout1_clk.vout1_clk */
    	{VOUT1_DE, (M0 | PIN_OUTPUT)},	/* vout1_de.vout1_de */
    	{VOUT1_FLD, (M14 | PIN_INPUT)},	/* vout1_fld.gpio4_21 */
    	{VOUT1_HSYNC, (M0 | PIN_OUTPUT)},	/* vout1_hsync.vout1_hsync */
    	{VOUT1_VSYNC, (M0 | PIN_OUTPUT)},	/* vout1_vsync.vout1_vsync */
    	{VOUT1_D0, (M0 | PIN_OUTPUT)},	/* vout1_d0.vout1_d0 */
    	{VOUT1_D1, (M0 | PIN_OUTPUT)},	/* vout1_d1.vout1_d1 */
    	{VOUT1_D2, (M0 | PIN_OUTPUT)},	/* vout1_d2.vout1_d2 */
    	{VOUT1_D3, (M0 | PIN_OUTPUT)},	/* vout1_d3.vout1_d3 */
    	{VOUT1_D4, (M0 | PIN_OUTPUT)},	/* vout1_d4.vout1_d4 */
    	{VOUT1_D5, (M0 | PIN_OUTPUT)},	/* vout1_d5.vout1_d5 */
    	{VOUT1_D6, (M0 | PIN_OUTPUT)},	/* vout1_d6.vout1_d6 */
    	{VOUT1_D7, (M0 | PIN_OUTPUT)},	/* vout1_d7.vout1_d7 */
    	{VOUT1_D8, (M0 | PIN_OUTPUT)},	/* vout1_d8.vout1_d8 */
    	{VOUT1_D9, (M0 | PIN_OUTPUT)},	/* vout1_d9.vout1_d9 */
    	{VOUT1_D10, (M0 | PIN_OUTPUT)},	/* vout1_d10.vout1_d10 */
    	{VOUT1_D11, (M0 | PIN_OUTPUT)},	/* vout1_d11.vout1_d11 */
    	{VOUT1_D12, (M0 | PIN_OUTPUT)},	/* vout1_d12.vout1_d12 */
    	{VOUT1_D13, (M0 | PIN_OUTPUT)},	/* vout1_d13.vout1_d13 */
    	{VOUT1_D14, (M0 | PIN_OUTPUT)},	/* vout1_d14.vout1_d14 */
    	{VOUT1_D15, (M0 | PIN_OUTPUT)},	/* vout1_d15.vout1_d15 */
    	{VOUT1_D16, (M0 | PIN_OUTPUT)},	/* vout1_d16.vout1_d16 */
    	{VOUT1_D17, (M0 | PIN_OUTPUT)},	/* vout1_d17.vout1_d17 */
    	{VOUT1_D18, (M0 | PIN_OUTPUT)},	/* vout1_d18.vout1_d18 */
    	{VOUT1_D19, (M0 | PIN_OUTPUT)},	/* vout1_d19.vout1_d19 */
    	{VOUT1_D20, (M0 | PIN_OUTPUT)},	/* vout1_d20.vout1_d20 */
    	{VOUT1_D21, (M0 | PIN_OUTPUT)},	/* vout1_d21.vout1_d21 */
    	{VOUT1_D22, (M0 | PIN_OUTPUT)},	/* vout1_d22.vout1_d22 */
    	{VOUT1_D23, (M0 | PIN_OUTPUT)},	/* vout1_d23.vout1_d23 */
    	{MDIO_MCLK, (M0 | PIN_OUTPUT)},	/* mdio_mclk.mdio_mclk */
    	{MDIO_D, (M0 | PIN_INPUT)},	/* mdio_d.mdio_d */
    	{RMII_MHZ_50_CLK, (M14 | PIN_INPUT_PULLUP)},	/* RMII_MHZ_50_CLK.gpio5_17 */
    	{UART3_RXD, (M14 | PIN_INPUT_PULLDOWN)},	/* uart3_rxd.gpio5_18 */
    	{UART3_TXD, (M14 | PIN_INPUT_PULLDOWN)},	/* uart3_txd.gpio5_19 */
    	{RGMII0_TXC, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txc.rgmii0_txc */
    	{RGMII0_TXCTL, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txctl.rgmii0_txctl */
    	{RGMII0_TXD3, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd3.rgmii0_txd3 */
    	{RGMII0_TXD2, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd2.rgmii0_txd2 */
    	{RGMII0_TXD1, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd1.rgmii0_txd1 */
    	{RGMII0_TXD0, (M0 | PIN_OUTPUT | MANUAL_MODE)},	/* rgmii0_txd0.rgmii0_txd0 */
    	{RGMII0_RXC, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxc.rgmii0_rxc */
    	{RGMII0_RXCTL, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxctl.rgmii0_rxctl */
    	{RGMII0_RXD3, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxd3.rgmii0_rxd3 */
    	{RGMII0_RXD2, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxd2.rgmii0_rxd2 */
    	{RGMII0_RXD1, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxd1.rgmii0_rxd1 */
    	{RGMII0_RXD0, (M0 | PIN_INPUT | MANUAL_MODE)},	/* rgmii0_rxd0.rgmii0_rxd0 */
    	{USB1_DRVVBUS, (M0 | PIN_OUTPUT)},	/* usb1_drvvbus.usb1_drvvbus */
    	{USB2_DRVVBUS, (M0 | PIN_OUTPUT_PULLDOWN)},	/* usb2_drvvbus.usb2_drvvbus */
    	{GPIO6_14, (M10 | PIN_INPUT_PULLUP)},	/* gpio6_14.timer1 */
    	{GPIO6_15, (M10 | PIN_INPUT_PULLUP)},	/* gpio6_15.timer2 */
    	{GPIO6_16, (M10 | PIN_INPUT_PULLUP)},	/* gpio6_16.timer3 */
    	{XREF_CLK0, (M9 | PIN_OUTPUT_PULLDOWN)},	/* xref_clk0.clkout2 */
    	{XREF_CLK1, (M14 | PIN_INPUT_PULLDOWN)},	/* xref_clk1.gpio6_18 */
    	{XREF_CLK2, (M14 | PIN_INPUT_PULLDOWN)},	/* xref_clk2.gpio6_19 */
    	{XREF_CLK3, (M9 | PIN_OUTPUT_PULLDOWN)},	/* xref_clk3.clkout3 */
    	{MCASP1_ACLKX, (M10 | PIN_INPUT_PULLUP)},	/* mcasp1_aclkx.i2c3_sda */
    	{MCASP1_FSX, (M10 | PIN_INPUT_PULLUP)},	/* mcasp1_fsx.i2c3_scl */
    	{MCASP1_ACLKR, (M10 | PIN_INPUT_PULLUP)},	/* mcasp1_aclkr.i2c4_sda */
    	{MCASP1_FSR, (M10 | PIN_INPUT_PULLUP)},	/* mcasp1_fsr.i2c4_scl */
    //	{MCASP1_AXR0, (M10 | PIN_INPUT_PULLUP)},	/* mcasp1_axr0.i2c5_sda */
    //	{MCASP1_AXR1, (M10 | PIN_INPUT_PULLUP)},	/* mcasp1_axr1.i2c5_scl */
    	{MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr2.gpio5_4 */
    	{MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr3.gpio5_5 */
    	{MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr4.gpio5_6 */
    	{MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr5.gpio5_7 */
    	{MCASP1_AXR6, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr6.gpio5_8 */
    	{MCASP1_AXR7, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr7.gpio5_9 */
    	{MCASP1_AXR12, (M1 | PIN_INPUT | VIRTUAL_MODE10)},	/* mcasp1_axr12.mcasp7_axr0 */
    	{MCASP1_AXR13, (M1 | PIN_INPUT | VIRTUAL_MODE10)},	/* mcasp1_axr13.mcasp7_axr1 */
    	{MCASP1_AXR14, (M1 | PIN_INPUT | VIRTUAL_MODE10)},	/* mcasp1_axr14.mcasp7_aclkx */
    	{MCASP1_AXR15, (M1 | PIN_INPUT | VIRTUAL_MODE10)},	/* mcasp1_axr15.mcasp7_fsx */
    	{MCASP2_ACLKX, (M0 | PIN_INPUT_PULLDOWN)},	/* mcasp2_aclkx.mcasp2_aclkx */
    	{MCASP2_FSX, (M0 | PIN_INPUT)},	/* mcasp2_fsx.mcasp2_fsx */
    	{MCASP2_ACLKR, (M0 | PIN_INPUT_PULLDOWN)},	/* mcasp2_aclkr.mcasp2_aclkr */
    	{MCASP2_FSR, (M0 | PIN_INPUT_PULLDOWN)},	/* mcasp2_fsr.mcasp2_fsr */
    	{MCASP2_AXR0, (M0 | PIN_INPUT_PULLDOWN)},	/* mcasp2_axr0.mcasp2_axr0 */
    	{MCASP2_AXR1, (M0 | PIN_INPUT_PULLDOWN)},	/* mcasp2_axr1.mcasp2_axr1 */
    	{MCASP2_AXR2, (M0 | PIN_INPUT)},	/* mcasp2_axr2.mcasp2_axr2 */
    	{MCASP2_AXR3, (M0 | PIN_INPUT)},	/* mcasp2_axr3.mcasp2_axr3 */
    	{MCASP2_AXR4, (M0 | PIN_INPUT_PULLDOWN)},	/* mcasp2_axr4.mcasp2_axr4 */
    	{MCASP2_AXR5, (M0 | PIN_INPUT_PULLDOWN)},	/* mcasp2_axr5.mcasp2_axr5 */
    	{MCASP2_AXR6, (M0 | PIN_INPUT_PULLDOWN)},	/* mcasp2_axr6.mcasp2_axr6 */
    	{MCASP2_AXR7, (M0 | PIN_INPUT_PULLDOWN)},	/* mcasp2_axr7.mcasp2_axr7 */
    	{MCASP3_ACLKX, (M0 | PIN_INPUT_PULLDOWN)},	/* mcasp3_aclkx.mcasp3_aclkx */
    	{MCASP3_FSX, (M0 | PIN_INPUT_PULLDOWN)},	/* mcasp3_fsx.mcasp3_fsx */
    	{MCASP3_AXR0, (M0 | PIN_INPUT_PULLDOWN)},	/* mcasp3_axr0.mcasp3_axr0 */
    	{MCASP3_AXR1, (M0 | PIN_INPUT_PULLDOWN)},	/* mcasp3_axr1.mcasp3_axr1 */
    	{MCASP4_ACLKX, (M3 | PIN_INPUT_PULLUP)},	/* mcasp4_aclkx.uart8_rxd */
    	{MCASP4_FSX, (M3 | PIN_OUTPUT_PULLDOWN)},	/* mcasp4_fsx.uart8_txd */
    	{MCASP4_AXR0, (M3 | PIN_INPUT_PULLDOWN)},	/* mcasp4_axr0.uart8_ctsn */
    	{MCASP4_AXR1, (M3 | PIN_OUTPUT_PULLUP)},	/* mcasp4_axr1.uart8_rtsn */
    	{MCASP5_ACLKX, (M3 | PIN_INPUT_PULLUP)},	/* mcasp5_aclkx.uart9_rxd */
    	{MCASP5_FSX, (M3 | PIN_OUTPUT_PULLDOWN)},	/* mcasp5_fsx.uart9_txd */
    	{MCASP5_AXR0, (M3 | PIN_INPUT_PULLDOWN)},	/* mcasp5_axr0.uart9_ctsn */
    	{MCASP5_AXR1, (M3 | PIN_OUTPUT_PULLUP)},	/* mcasp5_axr1.uart9_rtsn */
    	{MMC1_CLK, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_clk.mmc1_clk */
    	{MMC1_CMD, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_cmd.mmc1_cmd */
    	{MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat0.mmc1_dat0 */
    	{MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat1.mmc1_dat1 */
    	{MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat2.mmc1_dat2 */
    	{MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat3.mmc1_dat3 */
    	{MMC1_SDCD, (M14 | PIN_INPUT_PULLUP)},	/* mmc1_sdcd.gpio6_27 */
    	{GPIO6_10, (M10 | PIN_OUTPUT_PULLDOWN)},	/* gpio6_10.ehrpwm2A */
    //	{GPIO6_11, (M0 | PIN_INPUT_PULLUP)},	/* gpio6_11.gpio6_11 used for Cam_En in LCD Module*/
    	{MMC3_CLK, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* mmc3_clk.mmc3_clk */
    	{MMC3_CMD, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* mmc3_cmd.mmc3_cmd */
    	{MMC3_DAT0, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* mmc3_dat0.mmc3_dat0 */
    	{MMC3_DAT1, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* mmc3_dat1.mmc3_dat1 */
    	{MMC3_DAT2, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* mmc3_dat2.mmc3_dat2 */
    	{MMC3_DAT3, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* mmc3_dat3.mmc3_dat3 */
    	{MMC3_DAT4, (M1 | PIN_OUTPUT_PULLDOWN)},	/* mmc3_dat4.spi4_sclk */
    	{MMC3_DAT5, (M1 | PIN_INPUT_PULLDOWN)},	/* mmc3_dat5.spi4_d1 */
    	{MMC3_DAT6, (M1 | PIN_INPUT_PULLDOWN)},	/* mmc3_dat6.spi4_d0 */
    	{MMC3_DAT7, (M1 | PIN_OUTPUT_PULLUP)},	/* mmc3_dat7.spi4_cs0 */
    	{SPI1_SCLK, (M14 | PIN_INPUT_PULLDOWN)},	/* spi1_sclk.gpio7_7 */
    	{SPI1_D1, (M14 | PIN_INPUT_PULLDOWN)},	/* spi1_d1.gpio7_8 */
    	{SPI1_D0, (M14 | PIN_INPUT_PULLDOWN)},	/* spi1_d0.gpio7_9 */
    	{SPI1_CS0, (M14 | PIN_INPUT)},	/* spi1_cs0.gpio7_10 */
    	{SPI1_CS1, (M14 | PIN_INPUT)},	/* spi1_cs1.gpio7_11 */
    	{SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)},	/* spi1_cs2.gpio7_12 */
    	{SPI1_CS3, (M6 | PIN_INPUT_PULLUP)},	/* spi1_cs3.hdmi1_cec */
    	{SPI2_SCLK, (M14 | PIN_INPUT_PULLDOWN)},	/* spi2_sclk.gpio7_14 */
    	{SPI2_D1, (M14 | PIN_INPUT_PULLDOWN)},	/* spi2_d1.gpio7_15 */
    	{SPI2_D0, (M14 | PIN_INPUT_PULLUP)},	/* spi2_d0.gpio7_16 */
    	{SPI2_CS0, (M14 | PIN_INPUT_PULLUP)},	/* spi2_cs0.gpio7_17 */
    	{DCAN1_TX, (M15 | PULL_UP)},	/* dcan1_tx.safe for dcan1_tx */
    	{DCAN1_RX, (M15 | PULL_UP)},	/* dcan1_rx.safe for dcan1_rx */
    	{UART1_RXD, (M0 | PIN_INPUT_PULLUP)},	/* uart1_rxd.uart1_rxd */
    	{UART1_TXD, (M0 | PIN_OUTPUT_PULLDOWN)},	/* uart1_txd.uart1_txd */
    	{UART1_CTSN, (M14 | PIN_INPUT_PULLDOWN)},	/* uart1_ctsn.gpio7_24 */
    	{UART1_RTSN, (M14 | PIN_INPUT)},	/* uart1_rtsn.gpio7_25 */
    	{UART2_RXD, (M14 | PIN_INPUT_PULLDOWN)},	/* uart2_rxd.gpio7_26 */
    	{UART2_TXD, (M14 | PIN_INPUT_PULLDOWN)},	/* uart2_txd.gpio7_27 */
    	{UART2_CTSN, (M2 | PIN_INPUT_PULLUP)},	/* uart2_ctsn.uart3_rxd */
    	{UART2_RTSN, (M1 | PIN_OUTPUT_PULLDOWN)},	/* uart2_rtsn.uart3_txd */
    	{I2C1_SDA, (M0 | PIN_INPUT_PULLUP)},	/* i2c1_sda.i2c1_sda */
    	{I2C1_SCL, (M0 | PIN_INPUT_PULLUP)},	/* i2c1_scl.i2c1_scl */
    	{I2C2_SDA, (M1 | PIN_INPUT_PULLUP)},	/* i2c2_sda.hdmi1_ddc_scl */
    	{I2C2_SCL, (M1 | PIN_INPUT_PULLUP)},	/* i2c2_scl.hdmi1_ddc_sda */
    	{WAKEUP0, (M0 | PIN_INPUT)},	/* Wakeup0.Wakeup0 */
    	{WAKEUP1, (M0 | PIN_INPUT)},	/* Wakeup1.Wakeup1 */
    	{WAKEUP2, (M0 | PIN_INPUT)},	/* Wakeup2.Wakeup2 */
    	{WAKEUP3, (M0 | PIN_INPUT)},	/* Wakeup3.Wakeup3 */
    	{ON_OFF, (M0 | PIN_OUTPUT)},	/* on_off.on_off */
    	{RTC_PORZ, (M0 | PIN_INPUT)},	/* rtc_porz.rtc_porz */
    	{TMS, (M0 | PIN_INPUT_PULLUP)},	/* tms.tms */
    	{TDI, (M0 | PIN_INPUT_PULLUP)},	/* tdi.tdi */
    	{TDO, (M0 | PIN_OUTPUT)},	/* tdo.tdo */
    	{TCLK, (M0 | PIN_INPUT_PULLDOWN)},	/* tclk.tclk */
    	{TRSTN, (M0 | PIN_INPUT)},	/* trstn.trstn */
    	{RTCK, (M0 | PIN_OUTPUT)},	/* rtck.rtck */
    	{EMU0, (M0 | PIN_INPUT)},	/* emu0.emu0 */
    	{EMU1, (M0 | PIN_INPUT)},	/* emu1.emu1 */
    	{NMIN_DSP, (M0 | PIN_INPUT)},	/* nmin_dsp.nmin_dsp */
    	{RSTOUTN, (M0 | PIN_OUTPUT)},	/* rstoutn.rstoutn */
    };
    
    const struct pad_conf_entry core_padconf_array_delta_x15_sr1_1[] = {
    	{MMC1_SDWP, (M14 | PIN_OUTPUT)},	/* mmc1_sdwp.gpio6_28 */
    };
    
    const struct pad_conf_entry core_padconf_array_delta_x15_sr2_0[] = {
    	{VIN1A_CLK0, (M14 | PIN_INPUT)},	/* vin1a_clk0.gpio2_30 */
    };
    
    const struct pad_conf_entry core_padconf_array_essential_am572x_idk[] = {
    	{GPMC_A0, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a0.vin4b_d0 */
    	{GPMC_A1, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a1.vin4b_d1 */
    	{GPMC_A2, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a2.vin4b_d2 */
    	{GPMC_A3, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a3.vin4b_d3 */
    	{GPMC_A4, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a4.vin4b_d4 */
    	{GPMC_A5, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a5.vin4b_d5 */
    	{GPMC_A6, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a6.vin4b_d6 */
    	{GPMC_A7, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a7.vin4b_d7 */
    	{GPMC_A8, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a8.vin4b_hsync1 */
    	{GPMC_A9, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a9.vin4b_vsync1 */
    	{GPMC_A10, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a10.vin4b_clk1 */
    	{GPMC_A11, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a11.vin4b_de1 */
    	{GPMC_A12, (M6 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a12.vin4b_fld1 */
    	{GPMC_A13, (M1 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a13.qspi1_rtclk */
    	{GPMC_A14, (M1 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a14.qspi1_d3 */
    	{GPMC_A15, (M1 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a15.qspi1_d2 */
    	{GPMC_A16, (M1 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a16.qspi1_d0 */
    	{GPMC_A17, (M1 | PIN_INPUT | MANUAL_MODE)},	/* gpmc_a17.qspi1_d1 */
    	{GPMC_A18, (M1 | PIN_OUTPUT | MANUAL_MODE)},	/* gpmc_a18.qspi1_sclk */
    	{GPMC_A19, (M1 | PIN_INPUT)},	/* gpmc_a19.mmc2_dat4 */
    	{GPMC_A20, (M1 | PIN_INPUT)},	/* gpmc_a20.mmc2_dat5 */
    	{GPMC_A21, (M1 | PIN_INPUT)},	/* gpmc_a21.mmc2_dat6 */
    	{GPMC_A22, (M1 | PIN_INPUT)},	/* gpmc_a22.mmc2_dat7 */
    	{GPMC_A23, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a23.mmc2_clk */
    	{GPMC_A24, (M1 | PIN_INPUT)},	/* gpmc_a24.mmc2_dat0 */
    	{GPMC_A25, (M1 | PIN_INPUT)},	/* gpmc_a25.mmc2_dat1 */
    	{GPMC_A26, (M1 | PIN_INPUT)},	/* gpmc_a26.mmc2_dat2 */
    	{GPMC_A27, (M1 | PIN_INPUT)},	/* gpmc_a27.mmc2_dat3 */
    	{GPMC_CS1, (M1 | PIN_INPUT)},	/* gpmc_cs1.mmc2_cmd */
    	{GPMC_CS2, (M1 | PIN_OUTPUT | MANUAL_MODE)},	/* gpmc_cs2.qspi1_cs0 */
    	{VIN1A_D5, (M14 | PIN_OUTPUT)},	/* vin1a_d5.gpio3_9 */
    	{VIN1A_D6, (M14 | PIN_OUTPUT)},	/* vin1a_d6.gpio3_10 */
    	{VIN1A_D7, (M14 | PIN_OUTPUT)},	/* vin1a_d7.gpio3_11 */
    	{VIN1A_D8, (M14 | PIN_OUTPUT)},	/* vin1a_d8.gpio3_12 */
    	{VIN1A_D10, (M14 | PIN_INPUT_PULLDOWN)},	/* vin1a_d10.gpio3_14 */
    	{VIN1A_D12, (M14 | PIN_INPUT)},	/* vin1a_d12.gpio3_16 */
    	{VIN1A_D13, (M14 | PIN_OUTPUT)},	/* vin1a_d13.gpio3_17 */
    	{VIN1A_D14, (M14 | PIN_OUTPUT)},	/* vin1a_d14.gpio3_18 */
    	{VIN1A_D15, (M14 | PIN_OUTPUT)},	/* vin1a_d15.gpio3_19 */
    	{VIN1A_D17, (M14 | PIN_OUTPUT)},	/* vin1a_d17.gpio3_21 */
    	{VIN1A_D18, (M14 | PIN_OUTPUT_PULLDOWN)},	/* vin1a_d18.gpio3_22 */
    	{VIN1A_D19, (M14 | PIN_OUTPUT_PULLUP)},	/* vin1a_d19.gpio3_23 */
    	{VIN1A_D22, (M14 | PIN_INPUT)},	/* vin1a_d22.gpio3_26 */
    	{VIN2A_CLK0, (M14 | PIN_INPUT_PULLUP)},	/* vin2a_clk0.gpio3_28 */
    	{VIN2A_DE0, (M14 | PIN_INPUT_PULLUP)},	/* vin2a_de0.gpio3_29 */
    	{VIN2A_FLD0, (M14 | PIN_INPUT_PULLUP)},	/* vin2a_fld0.gpio3_30 */
    	{VIN2A_HSYNC0, (M14 | PIN_INPUT_PULLUP)},	/* vin2a_hsync0.gpio3_31 */
    	{VIN2A_VSYNC0, (M14 | PIN_INPUT)},	/* vin2a_vsync0.gpio4_0 */
    	{VIN2A_D0, (M11 | PIN_INPUT)},	/* vin2a_d0.pr1_uart0_rxd */
    	{VIN2A_D1, (M11 | PIN_OUTPUT)},	/* vin2a_d1.pr1_uart0_txd */
    	{VIN2A_D2, (M10 | PIN_OUTPUT)},	/* vin2a_d2.eCAP1_in_PWM1_out */
    	{VIN2A_D3, (M11 | PIN_INPUT_PULLDOWN)},	/* vin2a_d3.pr1_edc_latch0_in */
    	{VIN2A_D4, (M11 | PIN_OUTPUT)},	/* vin2a_d4.pr1_edc_sync0_out */
    	{VIN2A_D5, (M13 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d5.pr1_pru1_gpo2 */
    	{VIN2A_D10, (M11 | PIN_OUTPUT_PULLDOWN)},	/* vin2a_d10.pr1_mdio_mdclk */
    	{VIN2A_D11, (M11 | PIN_INPUT)},	/* vin2a_d11.pr1_mdio_data */
    	{VIN2A_D12, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d12.rgmii1_txc */
    	{VIN2A_D13, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d13.rgmii1_txctl */
    	{VIN2A_D14, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d14.rgmii1_txd3 */
    	{VIN2A_D15, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d15.rgmii1_txd2 */
    	{VIN2A_D16, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d16.rgmii1_txd1 */
    	{VIN2A_D17, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d17.rgmii1_txd0 */
    	{VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d18.rgmii1_rxc */
    	{VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d19.rgmii1_rxctl */
    	{VIN2A_D20, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* vin2a_d20.rgmii1_rxd3 */
    	{VIN2A_D21, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* vin2a_d21.rgmii1_rxd2 */
    	{VIN2A_D22, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* vin2a_d22.rgmii1_rxd1 */
    	{VIN2A_D23, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* vin2a_d23.rgmii1_rxd0 */
    	{VOUT1_CLK, (M0 | PIN_OUTPUT)},	/* vout1_clk.vout1_clk */
    	{VOUT1_DE, (M0 | PIN_OUTPUT)},	/* vout1_de.vout1_de */
    	{VOUT1_FLD, (M14 | PIN_OUTPUT)},	/* vout1_fld.gpio4_21 */
    	{VOUT1_HSYNC, (M0 | PIN_OUTPUT)},	/* vout1_hsync.vout1_hsync */
    	{VOUT1_VSYNC, (M0 | PIN_OUTPUT)},	/* vout1_vsync.vout1_vsync */
    	{VOUT1_D0, (M0 | PIN_OUTPUT)},	/* vout1_d0.vout1_d0 */
    	{VOUT1_D1, (M0 | PIN_OUTPUT)},	/* vout1_d1.vout1_d1 */
    	{VOUT1_D2, (M0 | PIN_OUTPUT)},	/* vout1_d2.vout1_d2 */
    	{VOUT1_D3, (M0 | PIN_OUTPUT)},	/* vout1_d3.vout1_d3 */
    	{VOUT1_D4, (M0 | PIN_OUTPUT)},	/* vout1_d4.vout1_d4 */
    	{VOUT1_D5, (M0 | PIN_OUTPUT)},	/* vout1_d5.vout1_d5 */
    	{VOUT1_D6, (M0 | PIN_OUTPUT)},	/* vout1_d6.vout1_d6 */
    	{VOUT1_D7, (M0 | PIN_OUTPUT)},	/* vout1_d7.vout1_d7 */
    	{VOUT1_D8, (M0 | PIN_OUTPUT)},	/* vout1_d8.vout1_d8 */
    	{VOUT1_D9, (M0 | PIN_OUTPUT)},	/* vout1_d9.vout1_d9 */
    	{VOUT1_D10, (M0 | PIN_OUTPUT)},	/* vout1_d10.vout1_d10 */
    	{VOUT1_D11, (M0 | PIN_OUTPUT)},	/* vout1_d11.vout1_d11 */
    	{VOUT1_D12, (M0 | PIN_OUTPUT)},	/* vout1_d12.vout1_d12 */
    	{VOUT1_D13, (M0 | PIN_OUTPUT)},	/* vout1_d13.vout1_d13 */
    	{VOUT1_D14, (M0 | PIN_OUTPUT)},	/* vout1_d14.vout1_d14 */
    	{VOUT1_D15, (M0 | PIN_OUTPUT)},	/* vout1_d15.vout1_d15 */
    	{VOUT1_D16, (M0 | PIN_OUTPUT)},	/* vout1_d16.vout1_d16 */
    	{VOUT1_D17, (M0 | PIN_OUTPUT)},	/* vout1_d17.vout1_d17 */
    	{VOUT1_D18, (M0 | PIN_OUTPUT)},	/* vout1_d18.vout1_d18 */
    	{VOUT1_D19, (M0 | PIN_OUTPUT)},	/* vout1_d19.vout1_d19 */
    	{VOUT1_D20, (M0 | PIN_OUTPUT)},	/* vout1_d20.vout1_d20 */
    	{VOUT1_D21, (M0 | PIN_OUTPUT)},	/* vout1_d21.vout1_d21 */
    	{VOUT1_D22, (M0 | PIN_OUTPUT)},	/* vout1_d22.vout1_d22 */
    	{VOUT1_D23, (M0 | PIN_OUTPUT)},	/* vout1_d23.vout1_d23 */
    	{MDIO_MCLK, (M0 | PIN_OUTPUT_PULLDOWN)},	/* mdio_mclk.mdio_mclk */
    	{MDIO_D, (M0 | PIN_INPUT)},	/* mdio_d.mdio_d */
    	{RGMII0_TXC, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txc.rgmii0_txc */
    	{RGMII0_TXCTL, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txctl.rgmii0_txctl */
    	{RGMII0_TXD3, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd3.rgmii0_txd3 */
    	{RGMII0_TXD2, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd2.rgmii0_txd2 */
    	{RGMII0_TXD1, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd1.rgmii0_txd1 */
    	{RGMII0_TXD0, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd0.rgmii0_txd0 */
    	{RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxc.rgmii0_rxc */
    	{RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxctl.rgmii0_rxctl */
    	{RGMII0_RXD3, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* rgmii0_rxd3.rgmii0_rxd3 */
    	{RGMII0_RXD2, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* rgmii0_rxd2.rgmii0_rxd2 */
    	{RGMII0_RXD1, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* rgmii0_rxd1.rgmii0_rxd1 */
    	{RGMII0_RXD0, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* rgmii0_rxd0.rgmii0_rxd0 */
    	{USB1_DRVVBUS, (M0 | PIN_OUTPUT)},	/* usb1_drvvbus.usb1_drvvbus */
    	{USB2_DRVVBUS, (M0 | PIN_OUTPUT)},	/* usb2_drvvbus.usb2_drvvbus */
    	{GPIO6_14, (M0 | PIN_OUTPUT)},	/* gpio6_14.gpio6_14 */
    	{GPIO6_15, (M0 | PIN_OUTPUT)},	/* gpio6_15.gpio6_15 */
    	{GPIO6_16, (M0 | PIN_INPUT_PULLUP)},	/* gpio6_16.gpio6_16 */
    	{XREF_CLK0, (M11 | PIN_INPUT_PULLDOWN)},	/* xref_clk0.pr2_mii1_col */
    	{XREF_CLK1, (M11 | PIN_INPUT_PULLDOWN)},	/* xref_clk1.pr2_mii1_crs */
    	{XREF_CLK2, (M14 | PIN_OUTPUT)},	/* xref_clk2.gpio6_19 */
    	{XREF_CLK3, (M9 | PIN_OUTPUT_PULLDOWN)},	/* xref_clk3.clkout3 */
    	{MCASP1_ACLKX, (M11 | PIN_OUTPUT_PULLDOWN)},	/* mcasp1_aclkx.pr2_mdio_mdclk */
    	{MCASP1_FSX, (M11 | PIN_INPUT)},	/* mcasp1_fsx.pr2_mdio_data */
    	{MCASP1_ACLKR, (M14 | PIN_INPUT)},	/* mcasp1_aclkr.gpio5_0 */
    	{MCASP1_FSR, (M14 | PIN_INPUT)},	/* mcasp1_fsr.gpio5_1 */
    	{MCASP1_AXR0, (M11 | PIN_INPUT_PULLUP)},	/* mcasp1_axr0.pr2_mii0_rxer */
    	{MCASP1_AXR1, (M11 | PIN_INPUT_PULLUP)},	/* mcasp1_axr1.pr2_mii_mt0_clk */
    	{MCASP1_AXR2, (M14 | PIN_INPUT)},	/* mcasp1_axr2.gpio5_4 */
    	{MCASP1_AXR3, (M14 | PIN_INPUT)},	/* mcasp1_axr3.gpio5_5 */
    	{MCASP1_AXR4, (M14 | PIN_OUTPUT)},	/* mcasp1_axr4.gpio5_6 */
    	{MCASP1_AXR5, (M14 | PIN_OUTPUT)},	/* mcasp1_axr5.gpio5_7 */
    	{MCASP1_AXR6, (M14 | PIN_OUTPUT)},	/* mcasp1_axr6.gpio5_8 */
    	{MCASP1_AXR7, (M14 | PIN_OUTPUT)},	/* mcasp1_axr7.gpio5_9 */
    	{MCASP1_AXR8, (M11 | PIN_OUTPUT_PULLUP)},	/* mcasp1_axr8.pr2_mii0_txen */
    	{MCASP1_AXR9, (M11 | PIN_OUTPUT_PULLUP)},	/* mcasp1_axr9.pr2_mii0_txd3 */
    	{MCASP1_AXR10, (M11 | PIN_OUTPUT_PULLUP)},	/* mcasp1_axr10.pr2_mii0_txd2 */
    	{MCASP1_AXR11, (M11 | PIN_OUTPUT_PULLUP)},	/* mcasp1_axr11.pr2_mii0_txd1 */
    	{MCASP1_AXR12, (M11 | PIN_OUTPUT_PULLUP)},	/* mcasp1_axr12.pr2_mii0_txd0 */
    	{MCASP1_AXR13, (M11 | PIN_INPUT_PULLUP)},	/* mcasp1_axr13.pr2_mii_mr0_clk */
    	{MCASP1_AXR14, (M11 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr14.pr2_mii0_rxdv */
    	{MCASP1_AXR15, (M11 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr15.pr2_mii0_rxd3 */
    	{MCASP2_ACLKX, (M11 | PIN_INPUT_PULLDOWN)},	/* mcasp2_aclkx.pr2_mii0_rxd2 */
    	{MCASP2_FSX, (M11 | PIN_INPUT_PULLDOWN)},	/* mcasp2_fsx.pr2_mii0_rxd1 */
    	{MCASP2_AXR2, (M11 | PIN_INPUT_PULLDOWN)},	/* mcasp2_axr2.pr2_mii0_rxd0 */
    	{MCASP2_AXR3, (M11 | PIN_INPUT_PULLDOWN)},	/* mcasp2_axr3.pr2_mii0_rxlink */
    	{MCASP2_AXR4, (M14 | PIN_OUTPUT)},	/* mcasp2_axr4.gpio1_4 */
    	{MCASP2_AXR5, (M14 | PIN_OUTPUT)},	/* mcasp2_axr5.gpio6_7 */
    	{MCASP2_AXR6, (M14 | PIN_OUTPUT)},	/* mcasp2_axr6.gpio2_29 */
    	{MCASP2_AXR7, (M14 | PIN_OUTPUT)},	/* mcasp2_axr7.gpio1_5 */
    	{MCASP3_ACLKX, (M11 | PIN_INPUT_PULLDOWN)},	/* mcasp3_aclkx.pr2_mii0_crs */
    	{MCASP3_FSX, (M11 | PIN_INPUT_PULLDOWN)},	/* mcasp3_fsx.pr2_mii0_col */
    	{MCASP3_AXR0, (M11 | PIN_INPUT_PULLUP)},	/* mcasp3_axr0.pr2_mii1_rxer */
    	{MCASP3_AXR1, (M11 | PIN_INPUT_PULLUP)},	/* mcasp3_axr1.pr2_mii1_rxlink */
    	{MCASP4_ACLKX, (M2 | PIN_INPUT)},	/* mcasp4_aclkx.spi3_sclk */
    	{MCASP4_FSX, (M2 | PIN_INPUT)},	/* mcasp4_fsx.spi3_d1 */
    	{MCASP4_AXR1, (M2 | PIN_OUTPUT_PULLUP)},	/* mcasp4_axr1.spi3_cs0 */
    	{MCASP5_ACLKX, (M13 | PIN_OUTPUT | MANUAL_MODE)},	/* mcasp5_aclkx.pr2_pru1_gpo1 */
    	{MCASP5_FSX, (M12 | PIN_INPUT | MANUAL_MODE)},	/* mcasp5_fsx.pr2_pru1_gpi2 */
    	{MMC1_CLK, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_clk.mmc1_clk */
    	{MMC1_CMD, (M0 | PIN_INPUT)},	/* mmc1_cmd.mmc1_cmd */
    	{MMC1_DAT0, (M0 | PIN_INPUT)},	/* mmc1_dat0.mmc1_dat0 */
    	{MMC1_DAT1, (M0 | PIN_INPUT)},	/* mmc1_dat1.mmc1_dat1 */
    	{MMC1_DAT2, (M0 | PIN_INPUT)},	/* mmc1_dat2.mmc1_dat2 */
    	{MMC1_DAT3, (M0 | PIN_INPUT)},	/* mmc1_dat3.mmc1_dat3 */
    	{MMC1_SDCD, (M14 | PIN_INPUT)},	/* mmc1_sdcd.gpio6_27 */
    	{MMC1_SDWP, (M14 | PIN_INPUT)},	/* mmc1_sdwp.gpio6_28 */
    	{GPIO6_10, (M11 | PIN_INPUT_PULLUP)},	/* gpio6_10.pr2_mii_mt1_clk */
    	{GPIO6_11, (M11 | PIN_OUTPUT_PULLUP)},	/* gpio6_11.pr2_mii1_txen */
    	{MMC3_CLK, (M11 | PIN_OUTPUT_PULLUP)},	/* mmc3_clk.pr2_mii1_txd3 */
    	{MMC3_CMD, (M11 | PIN_OUTPUT_PULLUP)},	/* mmc3_cmd.pr2_mii1_txd2 */
    	{MMC3_DAT0, (M11 | PIN_OUTPUT_PULLUP)},	/* mmc3_dat0.pr2_mii1_txd1 */
    	{MMC3_DAT1, (M11 | PIN_OUTPUT_PULLUP)},	/* mmc3_dat1.pr2_mii1_txd0 */
    	{MMC3_DAT2, (M11 | PIN_INPUT_PULLUP)},	/* mmc3_dat2.pr2_mii_mr1_clk */
    	{MMC3_DAT3, (M11 | PIN_INPUT_PULLDOWN)},	/* mmc3_dat3.pr2_mii1_rxdv */
    	{MMC3_DAT4, (M11 | PIN_INPUT_PULLDOWN)},	/* mmc3_dat4.pr2_mii1_rxd3 */
    	{MMC3_DAT5, (M11 | PIN_INPUT_PULLDOWN)},	/* mmc3_dat5.pr2_mii1_rxd2 */
    	{MMC3_DAT6, (M11 | PIN_INPUT_PULLDOWN)},	/* mmc3_dat6.pr2_mii1_rxd1 */
    	{MMC3_DAT7, (M11 | PIN_INPUT_PULLDOWN)},	/* mmc3_dat7.pr2_mii1_rxd0 */
    	{SPI1_SCLK, (M14 | PIN_OUTPUT)},	/* spi1_sclk.gpio7_7 */
    	{SPI1_D1, (M14 | PIN_OUTPUT)},	/* spi1_d1.gpio7_8 */
    	{SPI1_D0, (M14 | PIN_OUTPUT)},	/* spi1_d0.gpio7_9 */
    	{SPI1_CS0, (M14 | PIN_OUTPUT)},	/* spi1_cs0.gpio7_10 */
    	{SPI1_CS1, (M14 | PIN_OUTPUT)},	/* spi1_cs1.gpio7_11 */
    	{SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)},	/* spi1_cs2.gpio7_12 */
    	{SPI1_CS3, (M6 | PIN_INPUT_PULLUP)},	/* spi1_cs3.hdmi1_cec */
    	{DCAN1_TX, (M15 | PULL_UP)},	/* dcan1_tx.safe for dcan1_tx */
    	{DCAN1_RX, (M15 | PULL_UP)},	/* dcan1_rx.safe for dcan1_rx */
    	{SPI2_SCLK, (M0 | PIN_INPUT)},	/* spi2_sclk.spi2_sclk */
    	{SPI2_D1, (M0 | PIN_OUTPUT)},	/* spi2_d1.spi2_d1 */
    	{SPI2_D0, (M0 | PIN_INPUT)},	/* spi2_d0.spi2_d0 */
    	{SPI2_CS0, (M0 | PIN_OUTPUT)},	/* spi2_cs0.spi2_cs0 */
    	{UART1_RXD, (M14 | PIN_OUTPUT)},	/* uart1_rxd.gpio7_22 */
    	{UART1_TXD, (M14 | PIN_OUTPUT)},	/* uart1_txd.gpio7_23 */
    	{UART2_RXD, (M4 | PIN_INPUT)},	/* uart2_rxd.uart2_rxd */
    	{UART2_TXD, (M0 | PIN_OUTPUT)},	/* uart2_txd.uart2_txd */
    	{UART2_CTSN, (M2 | PIN_INPUT)},	/* uart2_ctsn.uart3_rxd */
    	{UART2_RTSN, (M1 | PIN_OUTPUT)},	/* uart2_rtsn.uart3_txd */
    	{I2C1_SDA, (M0 | PIN_INPUT)},	/* i2c1_sda.i2c1_sda */
    	{I2C1_SCL, (M0 | PIN_INPUT)},	/* i2c1_scl.i2c1_scl */
    	{I2C2_SDA, (M1 | PIN_INPUT)},	/* i2c2_sda.hdmi1_ddc_scl */
    	{I2C2_SCL, (M1 | PIN_INPUT)},	/* i2c2_scl.hdmi1_ddc_sda */
    	{WAKEUP0, (M0 | PIN_INPUT)},	/* Wakeup0.Wakeup0 */
    	{WAKEUP1, (M0 | PIN_INPUT)},	/* Wakeup1.Wakeup1 */
    	{WAKEUP2, (M0 | PIN_INPUT)},	/* Wakeup2.Wakeup2 */
    	{WAKEUP3, (M0 | PIN_INPUT)},	/* Wakeup3.Wakeup3 */
    	{ON_OFF, (M0 | PIN_OUTPUT)},	/* on_off.on_off */
    	{RTC_PORZ, (M0 | PIN_INPUT)},	/* rtc_porz.rtc_porz */
    	{TMS, (M0 | PIN_INPUT_PULLUP)},	/* tms.tms */
    	{TDI, (M0 | PIN_INPUT_PULLUP)},	/* tdi.tdi */
    	{TDO, (M0 | PIN_OUTPUT_PULLUP)},	/* tdo.tdo */
    	{TCLK, (M0 | PIN_INPUT_PULLUP)},	/* tclk.tclk */
    	{TRSTN, (M0 | PIN_INPUT_PULLDOWN)},	/* trstn.trstn */
    	{RTCK, (M0 | PIN_OUTPUT_PULLUP)},	/* rtck.rtck */
    	{EMU0, (M0 | PIN_INPUT_PULLUP)},	/* emu0.emu0 */
    	{EMU1, (M0 | PIN_INPUT_PULLUP)},	/* emu1.emu1 */
    	{RESETN, (M0 | PIN_INPUT)},	/* resetn.resetn */
    	{RSTOUTN, (M0 | PIN_OUTPUT)},	/* rstoutn.rstoutn */
    };
    
    const struct pad_conf_entry core_padconf_array_essential_am571x_idk[] = {
    	{GPMC_A0, (M6 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE13)},	/* gpmc_a0.vin1b_d0 */
    	{GPMC_A1, (M6 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE13)},	/* gpmc_a1.vin1b_d1 */
    	{GPMC_A2, (M6 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE13)},	/* gpmc_a2.vin1b_d2 */
    	{GPMC_A3, (M6 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE11)},	/* gpmc_a3.vin1b_d3 */
    	{GPMC_A4, (M6 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE11)},	/* gpmc_a4.vin1b_d4 */
    	{GPMC_A5, (M6 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE13)},	/* gpmc_a5.vin1b_d5 */
    	{GPMC_A6, (M6 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE13)},	/* gpmc_a6.vin1b_d6 */
    	{GPMC_A7, (M6 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE13)},	/* gpmc_a7.vin1b_d7 */
    	{GPMC_A8, (M6 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)},	/* gpmc_a8.vin1b_hsync1 */
    	{GPMC_A9, (M6 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)},	/* gpmc_a9.vin1b_vsync1 */
    	{GPMC_A10, (M6 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)},	/* gpmc_a10.vin1b_clk1 */
    	{GPMC_A11, (M6 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE13)},	/* gpmc_a11.vin1b_de1 */
    	{GPMC_A12, (M6 | PIN_INPUT_PULLDOWN | VIRTUAL_MODE14)},	/* gpmc_a12.vin1b_fld1 */
    	{GPMC_A13, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a13.qspi1_rtclk */
    	{GPMC_A14, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* gpmc_a14.qspi1_d3 */
    	{GPMC_A15, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* gpmc_a15.qspi1_d2 */
    	{GPMC_A16, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a16.qspi1_d0 */
    	{GPMC_A17, (M1 | PIN_INPUT_PULLDOWN) | MANUAL_MODE},	/* gpmc_a17.qspi1_d1 */
    	{GPMC_A18, (M1 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* gpmc_a18.qspi1_sclk */
    	{GPMC_A19, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a19.mmc2_dat4 */
    	{GPMC_A20, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a20.mmc2_dat5 */
    	{GPMC_A21, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a21.mmc2_dat6 */
    	{GPMC_A22, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a22.mmc2_dat7 */
    	{GPMC_A23, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a23.mmc2_clk */
    	{GPMC_A24, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a24.mmc2_dat0 */
    	{GPMC_A25, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a25.mmc2_dat1 */
    	{GPMC_A26, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a26.mmc2_dat2 */
    	{GPMC_A27, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_a27.mmc2_dat3 */
    	{GPMC_CS1, (M1 | PIN_INPUT_PULLUP)},	/* gpmc_cs1.mmc2_cmd */
    	{GPMC_CS0, (M14 | PIN_INPUT_PULLDOWN)},	/* gpmc_cs0.gpio2_19 */
    	{GPMC_CS2, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* gpmc_cs2.qspi1_cs0 */
    	{GPMC_CS3, (M14 | PIN_INPUT_PULLDOWN)},	/* gpmc_cs3.gpio2_21 */
    	{GPMC_CLK, (M14 | PIN_INPUT_PULLUP)},	/* gpmc_clk.gpio2_22 */
    	{GPMC_ADVN_ALE, (M14 | PIN_INPUT_PULLUP)},	/* gpmc_advn_ale.gpio2_23 */
    	{GPMC_OEN_REN, (M14 | PIN_INPUT_PULLUP)},	/* gpmc_oen_ren.gpio2_24 */
    	{GPMC_WEN, (M14 | PIN_INPUT_PULLUP)},	/* gpmc_wen.gpio2_25 */
    	{GPMC_BEN0, (M14 | PIN_INPUT_PULLDOWN)},	/* gpmc_ben0.gpio2_26 */
    	{GPMC_BEN1, (M14 | PIN_INPUT_PULLUP)},	/* gpmc_ben1.gpio2_27 */
    	{GPMC_WAIT0, (M14 | PIN_INPUT_PULLDOWN | SLEWCONTROL)},	/* gpmc_wait0.gpio2_28 */
    	{VIN2A_CLK0, (M14 | PIN_INPUT_PULLUP)},	/* vin2a_clk0.gpio3_28 */
    	{VIN2A_DE0, (M14 | PIN_INPUT_PULLUP)},	/* vin2a_de0.gpio3_29 */
    	{VIN2A_FLD0, (M14 | PIN_INPUT_PULLUP)},	/* vin2a_fld0.gpio3_30 */
    	{VIN2A_HSYNC0, (M14 | PIN_INPUT_PULLUP)},	/* vin2a_hsync0.gpio3_31 */
    	{VIN2A_VSYNC0, (M14 | PIN_INPUT_PULLDOWN)},	/* vin2a_vsync0.gpio4_0 */
    	{VIN2A_D0, (M11 | PIN_INPUT_PULLDOWN)},	/* vin2a_d0.pr1_uart0_rxd */
    	{VIN2A_D1, (M11 | PIN_INPUT_PULLDOWN)},	/* vin2a_d1.pr1_uart0_txd */
    	{VIN2A_D2, (M10 | PIN_INPUT_PULLDOWN)},	/* vin2a_d2.eCAP1_in_PWM1_out */
    	{VIN2A_D10, (M11 | PIN_INPUT_PULLDOWN)},	/* vin2a_d10.pr1_mdio_mdclk */
    	{VIN2A_D11, (M11 | PIN_INPUT_PULLUP)},	/* vin2a_d11.pr1_mdio_data */
    	{VIN2A_D12, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d12.rgmii1_txc */
    	{VIN2A_D13, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d13.rgmii1_txctl */
    	{VIN2A_D14, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d14.rgmii1_txd3 */
    	{VIN2A_D15, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d15.rgmii1_txd2 */
    	{VIN2A_D16, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d16.rgmii1_txd1 */
    	{VIN2A_D17, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d17.rgmii1_txd0 */
    	{VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* vin2a_d18.rgmii1_rxc */
    	{VIN2A_D19, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* vin2a_d19.rgmii1_rxctl */
    	{VIN2A_D20, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* vin2a_d20.rgmii1_rxd3 */
    	{VIN2A_D21, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* vin2a_d21.rgmii1_rxd2 */
    	{VIN2A_D22, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* vin2a_d22.rgmii1_rxd1 */
    	{VIN2A_D23, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)},	/* vin2a_d23.rgmii1_rxd0 */
    	{VOUT1_FLD, (M14 | PIN_INPUT_PULLUP)},	/* vout1_fld.gpio4_21 */
    	{MDIO_MCLK, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mdio_mclk.mdio_mclk */
    	{MDIO_D, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* mdio_d.mdio_d */
    	{RMII_MHZ_50_CLK, (M13 | PIN_INPUT_PULLDOWN)},	/* RMII_MHZ_50_CLK.pr2_pru1_gpo2 */
    	{UART3_RXD, (M14 | PIN_INPUT_SLEW)},	/* uart3_rxd.gpio5_18 */
    	{UART3_TXD, (M14 | PIN_INPUT_SLEW)},	/* uart3_txd.gpio5_19 */
    	{RGMII0_TXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txc.rgmii0_txc */
    	{RGMII0_TXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txctl.rgmii0_txctl */
    	{RGMII0_TXD3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd3.rgmii0_txd3 */
    	{RGMII0_TXD2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd2.rgmii0_txd2 */
    	{RGMII0_TXD1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd1.rgmii0_txd1 */
    	{RGMII0_TXD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_txd0.rgmii0_txd0 */
    	{RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxc.rgmii0_rxc */
    	{RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},/* rgmii0_rxctl.rgmii0_rxctl */
    	{RGMII0_RXD3, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd3.rgmii0_rxd3 */
    	{RGMII0_RXD2, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd2.rgmii0_rxd2 */
    	{RGMII0_RXD1, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd1.rgmii0_rxd1 */
    	{RGMII0_RXD0, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)},	/* rgmii0_rxd0.rgmii0_rxd0 */
    	{USB1_DRVVBUS, (M0 | PIN_INPUT_SLEW)},	/* usb1_drvvbus.usb1_drvvbus */
    	{USB2_DRVVBUS, (M0 | PIN_INPUT_SLEW)},	/* usb2_drvvbus.usb2_drvvbus */
    	{GPIO6_14, (M14 | PIN_INPUT_PULLUP)},	/* gpio6_14.gpio6_14 */
    	{GPIO6_15, (M14 | PIN_INPUT_PULLUP)},	/* gpio6_15.gpio6_15 */
    	{GPIO6_16, (M14 | PIN_INPUT_PULLDOWN)},	/* gpio6_16.gpio6_16 */
    	{XREF_CLK0, (M11 | PIN_INPUT)},	/* xref_clk0.pr2_mii1_col */
    	{XREF_CLK1, (M11 | PIN_INPUT_PULLUP)},	/* xref_clk1.pr2_mii1_crs */
    	{XREF_CLK2, (M14 | PIN_INPUT_PULLDOWN)},	/* xref_clk2.gpio6_19 */
    	{XREF_CLK3, (M15 | PIN_INPUT_PULLDOWN)},	/* xref_clk3.Driveroff */
    	{MCASP1_ACLKX, (M11 | PIN_INPUT_PULLDOWN)},	/* mcasp1_aclkx.pr2_mdio_mdclk */
    	{MCASP1_FSX, (M11 | PIN_INPUT_SLEW)},	/* mcasp1_fsx.pr2_mdio_data */
    	{MCASP1_ACLKR, (M14 | PIN_INPUT_PULLUP)},	/* mcasp1_aclkr.gpio5_0 */
    	{MCASP1_FSR, (M14 | PIN_INPUT_PULLUP)},	/* mcasp1_fsr.gpio5_1 */
    	{MCASP1_AXR0, (M11 | PIN_INPUT_PULLUP)},	/* mcasp1_axr0.pr2_mii0_rxer */
    	{MCASP1_AXR1, (M11 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr1.pr2_mii_mt0_clk */
    	{MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr2.gpio5_4 */
    	{MCASP1_AXR3, (M14 | PIN_INPUT_PULLUP)},	/* mcasp1_axr3.gpio5_5 */
    	{MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr4.gpio5_6 */
    	{MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr5.gpio5_7 */
    	{MCASP1_AXR6, (M14 | PIN_INPUT_PULLUP)},	/* mcasp1_axr6.gpio5_8 */
    	{MCASP1_AXR7, (M14 | PIN_INPUT_PULLUP)},	/* mcasp1_axr7.gpio5_9 */
    	{MCASP1_AXR8, (M11 | PIN_OUTPUT)},	/* mcasp1_axr8.pr2_mii0_txen */
    	{MCASP1_AXR9, (M11 | PIN_OUTPUT)},	/* mcasp1_axr9.pr2_mii0_txd3 */
    	{MCASP1_AXR10, (M11 | PIN_OUTPUT)},	/* mcasp1_axr10.pr2_mii0_txd2 */
    	{MCASP1_AXR11, (M11 | PIN_OUTPUT)},	/* mcasp1_axr11.pr2_mii0_txd1 */
    	{MCASP1_AXR12, (M11 | PIN_OUTPUT)},	/* mcasp1_axr12.pr2_mii0_txd0 */
    	{MCASP1_AXR13, (M11 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr13.pr2_mii_mr0_clk */
    	{MCASP1_AXR14, (M11 | PIN_INPUT_PULLDOWN)},	/* mcasp1_axr14.pr2_mii0_rxdv */
    	{MCASP1_AXR15, (M11 | PIN_INPUT)},	/* mcasp1_axr15.pr2_mii0_rxd3 */
    	{MCASP2_ACLKX, (M11 | PIN_INPUT)},	/* mcasp2_aclkx.pr2_mii0_rxd2 */
    	{MCASP2_FSX, (M11 | PIN_INPUT)},	/* mcasp2_fsx.pr2_mii0_rxd1 */
    	{MCASP2_ACLKR, (M15 | PIN_INPUT_PULLDOWN)},	/* mcasp2_aclkr.Driveroff */
    	{MCASP2_FSR, (M15 | PIN_INPUT_PULLDOWN)},	/* mcasp2_fsr.Driveroff */
    	{MCASP2_AXR0, (M15 | PIN_INPUT_PULLDOWN)},	/* mcasp2_axr0.Driveroff */
    	{MCASP2_AXR1, (M15 | PIN_INPUT_PULLDOWN)},	/* mcasp2_axr1.Driveroff */
    	{MCASP2_AXR2, (M11 | PIN_INPUT)},	/* mcasp2_axr2.pr2_mii0_rxd0 */
    	{MCASP2_AXR3, (M11 | PIN_INPUT)},	/* mcasp2_axr3.pr2_mii0_rxlink */
    	{MCASP2_AXR4, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp2_axr4.gpio1_4 */
    	{MCASP2_AXR5, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp2_axr5.gpio6_7 */
    	{MCASP2_AXR6, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp2_axr6.gpio2_29 */
    	{MCASP2_AXR7, (M14 | PIN_INPUT_PULLDOWN)},	/* mcasp2_axr7.gpio1_5 */
    	{MCASP3_ACLKX, (M11 | PIN_INPUT_PULLUP)},	/* mcasp3_aclkx.pr2_mii0_crs */
    	{MCASP3_FSX, (M11 | PIN_INPUT)},	/* mcasp3_fsx.pr2_mii0_col */
    	{MCASP3_AXR0, (M11 | PIN_INPUT_PULLUP)},	/* mcasp3_axr0.pr2_mii1_rxer */
    	{MCASP3_AXR1, (M11 | PIN_INPUT)},	/* mcasp3_axr1.pr2_mii1_rxlink */
    	{MCASP4_ACLKX, (M2 | PIN_INPUT_PULLDOWN)},	/* mcasp4_aclkx.spi3_sclk */
    	{MCASP4_FSX, (M2 | PIN_INPUT_PULLDOWN)},	/* mcasp4_fsx.spi3_d1 */
    	{MCASP4_AXR0, (M15 | PIN_INPUT_PULLDOWN)},	/* mcasp4_axr0.Driveroff */
    	{MCASP4_AXR1, (M2 | PIN_INPUT_PULLDOWN)},	/* mcasp4_axr1.spi3_cs0 */
    	{MCASP5_ACLKX, (M13 | PIN_INPUT_PULLDOWN)},	/* mcasp5_aclkx.pr2_pru1_gpo1 */
    	{MCASP5_FSX, (M12 | PIN_INPUT_PULLDOWN)},	/* mcasp5_fsx.pr2_pru1_gpi2 */
    	{MCASP5_AXR0, (M15 | PIN_INPUT_PULLDOWN)},	/* mcasp5_axr0.Driveroff */
    	{MCASP5_AXR1, (M15 | PIN_INPUT_PULLDOWN)},	/* mcasp5_axr1.Driveroff */
    	{MMC1_CLK, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_clk.mmc1_clk */
    	{MMC1_CMD, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_cmd.mmc1_cmd */
    	{MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat0.mmc1_dat0 */
    	{MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat1.mmc1_dat1 */
    	{MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat2.mmc1_dat2 */
    	{MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)},	/* mmc1_dat3.mmc1_dat3 */
    	{MMC1_SDCD, (M14 | PIN_INPUT_PULLUP)},	/* mmc1_sdcd.gpio6_27 */
    	{MMC1_SDWP, (M0 | PIN_OUTPUT)},	/* mmc1_sdwp.mmc1_sdwp */
    	{GPIO6_10, (M11 | PIN_INPUT_PULLDOWN)},	/* gpio6_10.pr2_mii_mt1_clk */
    	{GPIO6_11, (M11 | PIN_OUTPUT)},	/* gpio6_11.pr2_mii1_txen */
    	{MMC3_CLK, (M11 | PIN_OUTPUT)},	/* mmc3_clk.pr2_mii1_txd3 */
    	{MMC3_CMD, (M11 | PIN_OUTPUT)},	/* mmc3_cmd.pr2_mii1_txd2 */
    	{MMC3_DAT0, (M11 | PIN_OUTPUT)},	/* mmc3_dat0.pr2_mii1_txd1 */
    	{MMC3_DAT1, (M11 | PIN_OUTPUT)},	/* mmc3_dat1.pr2_mii1_txd0 */
    	{MMC3_DAT2, (M11 | PIN_INPUT_PULLDOWN)},	/* mmc3_dat2.pr2_mii_mr1_clk */
    	{MMC3_DAT3, (M11 | PIN_INPUT_PULLDOWN)},	/* mmc3_dat3.pr2_mii1_rxdv */
    	{MMC3_DAT4, (M11 | PIN_INPUT)},	/* mmc3_dat4.pr2_mii1_rxd3 */
    	{MMC3_DAT5, (M11 | PIN_INPUT)},	/* mmc3_dat5.pr2_mii1_rxd2 */
    	{MMC3_DAT6, (M11 | PIN_INPUT)},	/* mmc3_dat6.pr2_mii1_rxd1 */
    	{MMC3_DAT7, (M11 | PIN_INPUT)},	/* mmc3_dat7.pr2_mii1_rxd0 */
    	{SPI1_SCLK, (M14 | PIN_INPUT_PULLDOWN)},	/* spi1_sclk.gpio7_7 */
    	{SPI1_D1, (M14 | PIN_INPUT_PULLDOWN)},	/* spi1_d1.gpio7_8 */
    	{SPI1_D0, (M14 | PIN_INPUT_PULLDOWN)},	/* spi1_d0.gpio7_9 */
    	{SPI1_CS0, (M14 | PIN_INPUT_PULLDOWN)},	/* spi1_cs0.gpio7_10 */
    	{SPI1_CS1, (M14 | PIN_INPUT_PULLDOWN)},	/* spi1_cs1.gpio7_11 */
    	{SPI1_CS2, (M14 | PIN_INPUT_PULLDOWN)},	/* spi1_cs2.gpio7_12 */
    	{SPI1_CS3, (M6 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* spi1_cs3.hdmi1_cec */
    	{SPI2_SCLK, (M0 | PIN_INPUT_PULLDOWN)},	/* spi2_sclk.spi2_sclk */
    	{SPI2_D1, (M0 | PIN_INPUT_SLEW)},	/* spi2_d1.spi2_d1 */
    	{SPI2_D0, (M0 | PIN_INPUT_SLEW)},	/* spi2_d0.spi2_d0 */
    	{SPI2_CS0, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* spi2_cs0.spi2_cs0 */
    	{DCAN1_TX, (M15 | PULL_UP)},	/* dcan1_tx.safe for dcan1_tx */
    	{DCAN1_RX, (M15 | PULL_UP)},	/* dcan1_rx.safe for dcan1_rx */
    	{UART1_RXD, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* uart1_rxd.gpio7_22 */
    	{UART1_CTSN, (M14 | PIN_INPUT_PULLDOWN)},	/* uart1_ctsn.gpio7_24 */
    	{UART1_RTSN, (M14 | PIN_INPUT_PULLDOWN)},	/* uart1_rtsn.gpio7_25 */
    	{UART2_RXD, (M0 | PIN_INPUT_PULLUP)},	/* uart2_rxd.uart2_rxd */
    	{UART2_TXD, (M0 | PIN_INPUT_PULLUP)},	/* uart2_txd.uart2_txd */
    	{UART2_CTSN, (M2 | PIN_INPUT_PULLUP)},	/* uart2_ctsn.uart3_rxd */
    	{UART2_RTSN, (M1 | PIN_INPUT_PULLUP)},	/* uart2_rtsn.uart3_txd */
    	{I2C2_SDA, (M1 | PIN_INPUT_PULLUP)},	/* i2c2_sda.hdmi1_ddc_scl */
    	{I2C2_SCL, (M1 | PIN_INPUT_PULLUP)},	/* i2c2_scl.hdmi1_ddc_sda */
    	{WAKEUP0, (M0 | PIN_OUTPUT_PULLDOWN)},	/* Wakeup0.Wakeup0 */
    	{WAKEUP3, (M0 | PIN_OUTPUT_PULLDOWN)},	/* Wakeup3.Wakeup3 */
    	{ON_OFF, (M0 | PIN_OUTPUT_PULLUP)},	/* on_off.on_off */
    	{RTC_PORZ, (M0 | PIN_OUTPUT)},	/* rtc_porz.rtc_porz */
    	{TMS, (M0 | PIN_INPUT_PULLUP)},	/* tms.tms */
    	{TDI, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},	/* tdi.tdi */
    	{TDO, (M0 | PIN_INPUT_PULLUP)},	/* tdo.tdo */
    	{TCLK, (M0 | PIN_INPUT_PULLUP)},	/* tclk.tclk */
    	{TRSTN, (M0 | PIN_INPUT_PULLDOWN)},	/* trstn.trstn */
    	{RTCK, (M0 | PIN_INPUT)},	/* rtck.rtck */
    	{EMU0, (M0 | PIN_INPUT_PULLUP)},	/* emu0.emu0 */
    	{EMU1, (M0 | PIN_INPUT_PULLUP)},	/* emu1.emu1 */
    	{RESETN, (M0 | PIN_OUTPUT_PULLUP)},	/* resetn.resetn */
    	{RSTOUTN, (M0 | PIN_OUTPUT_PULLDOWN)},	/* rstoutn.rstoutn */
    };
    
    const struct pad_conf_entry core_padconf_array_icss1eth_am571x_idk[] = {
    	/* PR1 MII0 */
    	{VOUT1_D8, (M12 | PIN_INPUT_PULLDOWN)},	/* vout1_d8.pr1_mii_mt0_clk */
    	{VOUT1_D9, (M13 | PIN_OUTPUT)},		/* vout1_d9.pr1_mii0_txd3 */
    	{VOUT1_D10, (M13 | PIN_OUTPUT)},	/* vout1_d10.pr1_mii0_txd2 */
    	{VOUT1_D11, (M13 | PIN_OUTPUT)},	/* vout1_d11.pr1_mii0_txen */
    	{VOUT1_D12, (M13 | PIN_OUTPUT)},	/* vout1_d12.pr1_mii0_txd1 */
    	{VOUT1_D13, (M13 | PIN_OUTPUT)},	/* vout1_d13.pr1_mii0_txd0 */
    	{VOUT1_D14, (M12 | PIN_INPUT_PULLDOWN)},	/* vout1_d14.pr1_mii_mr0_clk */
    	{VOUT1_D15, (M12 | PIN_INPUT_PULLDOWN)},	/* vout1_d15.pr1_mii0_rxdv */
    	{VOUT1_D16, (M12 | PIN_INPUT)},	/* vout1_d16.pr1_mii0_rxd3 */
    	{VOUT1_D17, (M12 | PIN_INPUT)},	/* vout1_d17.pr1_mii0_rxd2 */
    	{VOUT1_D18, (M12 | PIN_INPUT)},	/* vout1_d18.pr1_mii0_rxd1 */
    	{VOUT1_D19, (M12 | PIN_INPUT)},	/* vout1_d19.pr1_mii0_rxd0 */
    	{VOUT1_D20, (M12 | PIN_INPUT_PULLUP)},	/* vout1_d20.pr1_mii0_rxer */
    	{VOUT1_D21, (M12 | PIN_INPUT)},	/* vout1_d21.pr1_mii0_rxlink */
    	{VOUT1_D22, (M12 | PIN_INPUT)},	/* vout1_d22.pr1_mii0_col */
    	{VOUT1_D23, (M12 | PIN_INPUT_PULLUP)},	/* vout1_d23.pr1_mii0_crs */
    
    	/* PR1 MII1 */
    	{VIN2A_D3, (M12 | PIN_INPUT)},	/* vin2a_d3.pr1_mi1_col */
    	{VIN2A_D4, (M13 | PIN_OUTPUT)},	/* vin2a_d4.pr1_mii1_txd1 */
    	{VIN2A_D5, (M13 | PIN_OUTPUT)},	/* vin2a_d5.pr1_mii1_txd0 */
    	{VIN2A_D6, (M11 | PIN_INPUT_PULLDOWN)},	/* vin2a_d6.pr1_mii_mt1_clk */
    	{VIN2A_D7, (M11 | PIN_OUTPUT)},	/* vin2a_d7.pr1_mii1_txen */
    	{VIN2A_D8, (M11 | PIN_OUTPUT)},	/* vin2a_d8.pr1_mii1_txd3 */
    	{VIN2A_D9, (M11 | PIN_OUTPUT)},	/* vin2a_d9.pr1_mii1_txd2 */
    	{VOUT1_VSYNC, (M12 | PIN_INPUT_PULLUP)},	/* vout1_vsync.pr1_mii1_rxer */
    	{VOUT1_D0, (M12 | PIN_INPUT)},	/* vout1_d0.pr1_mii1_rxlink */
    	{VOUT1_D1, (M12 | PIN_INPUT_PULLUP)},	/* vout1_d1.pr1_mii1_crs */
    	{VOUT1_D2, (M12 | PIN_INPUT_PULLDOWN)},	/* vout1_d2.pr1_mii_mr1_clk */
    	{VOUT1_D3, (M12 | PIN_INPUT_PULLDOWN)},	/* vout1_d3.pr1_mii1_rxdv */
    	{VOUT1_D4, (M12 | PIN_INPUT)},	/* vout1_d4.pr1_mii1_rxd3 */
    	{VOUT1_D5, (M12 | PIN_INPUT)},	/* vout1_d5.pr1_mii1_rxd2 */
    	{VOUT1_D6, (M12 | PIN_INPUT)},	/* vout1_d6.pr1_mii1_rxd1 */
    	{VOUT1_D7, (M12 | PIN_INPUT)},	/* vout1_d7.pr1_mii1_rxd0 */
    };
    
    const struct pad_conf_entry core_padconf_array_vout_am571x_idk[] = {
    	{VOUT1_CLK, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_clk.vout1_clk */
    	{VOUT1_DE, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_de.vout1_de */
    	{VOUT1_HSYNC, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_hsync.vout1_hsync */
    	{VOUT1_VSYNC, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_vsync.vout1_vsync */
    	{VOUT1_D0, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d0.vout1_d0 */
    	{VOUT1_D1, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d1.vout1_d1 */
    	{VOUT1_D2, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d2.vout1_d2 */
    	{VOUT1_D3, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d3.vout1_d3 */
    	{VOUT1_D4, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d4.vout1_d4 */
    	{VOUT1_D5, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d5.vout1_d5 */
    	{VOUT1_D6, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d6.vout1_d6 */
    	{VOUT1_D7, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d7.vout1_d7 */
    	{VOUT1_D8, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d8.vout1_d8 */
    	{VOUT1_D9, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d9.vout1_d9 */
    	{VOUT1_D10, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d10.vout1_d10 */
    	{VOUT1_D11, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d11.vout1_d11 */
    	{VOUT1_D12, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d12.vout1_d12 */
    	{VOUT1_D13, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d13.vout1_d13 */
    	{VOUT1_D14, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d14.vout1_d14 */
    	{VOUT1_D15, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d15.vout1_d15 */
    	{VOUT1_D16, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d16.vout1_d16 */
    	{VOUT1_D17, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d17.vout1_d17 */
    	{VOUT1_D18, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d18.vout1_d18 */
    	{VOUT1_D19, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d19.vout1_d19 */
    	{VOUT1_D20, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d20.vout1_d20 */
    	{VOUT1_D21, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d21.vout1_d21 */
    	{VOUT1_D22, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d22.vout1_d22 */
    	{VOUT1_D23, (M0 | PIN_INPUT_PULLDOWN)},	/* vout1_d23.vout1_d23 */
    };
    
    const struct pad_conf_entry early_padconf[] = {
    	{UART2_CTSN, (M2 | PIN_INPUT_SLEW)},	/* uart2_ctsn.uart3_rxd */
    	{UART2_RTSN, (M1 | PIN_INPUT_SLEW)},	/* uart2_rtsn.uart3_txd */
    	{I2C1_SDA, (PIN_INPUT_PULLUP | M0)},	/* I2C1_SDA */
    	{I2C1_SCL, (PIN_INPUT_PULLUP | M0)},	/* I2C1_SCL */
    };
    
    #ifdef CONFIG_IODELAY_RECALIBRATION
    const struct iodelay_cfg_entry iodelay_cfg_array_x15_sr1_1[] = {
    	{0x0114, 2980, 0},	/* CFG_GPMC_A0_IN */
    	{0x0120, 2648, 0},	/* CFG_GPMC_A10_IN */
    	{0x012C, 2918, 0},	/* CFG_GPMC_A11_IN */
    	{0x0198, 2917, 0},	/* CFG_GPMC_A1_IN */
    	{0x0204, 3156, 178},	/* CFG_GPMC_A2_IN */
    	{0x0210, 3109, 246},	/* CFG_GPMC_A3_IN */
    	{0x021C, 3142, 100},	/* CFG_GPMC_A4_IN */
    	{0x0228, 3084, 33},	/* CFG_GPMC_A5_IN */
    	{0x0234, 2778, 0},	/* CFG_GPMC_A6_IN */
    	{0x0240, 3110, 0},	/* CFG_GPMC_A7_IN */
    	{0x024C, 2874, 0},	/* CFG_GPMC_A8_IN */
    	{0x0258, 3072, 0},	/* CFG_GPMC_A9_IN */
    	{0x0264, 2466, 0},	/* CFG_GPMC_AD0_IN */
    	{0x0270, 2523, 0},	/* CFG_GPMC_AD10_IN */
    	{0x027C, 2453, 0},	/* CFG_GPMC_AD11_IN */
    	{0x0288, 2285, 0},	/* CFG_GPMC_AD12_IN */
    	{0x0294, 2206, 0},	/* CFG_GPMC_AD13_IN */
    	{0x02A0, 1898, 0},	/* CFG_GPMC_AD14_IN */
    	{0x02AC, 2473, 0},	/* CFG_GPMC_AD15_IN */
    	{0x02B8, 2307, 0},	/* CFG_GPMC_AD1_IN */
    	{0x02C4, 2691, 0},	/* CFG_GPMC_AD2_IN */
    	{0x02D0, 2384, 0},	/* CFG_GPMC_AD3_IN */
    	{0x02DC, 2462, 0},	/* CFG_GPMC_AD4_IN */
    	{0x02E8, 2335, 0},	/* CFG_GPMC_AD5_IN */
    	{0x02F4, 2370, 0},	/* CFG_GPMC_AD6_IN */
    	{0x0300, 2389, 0},	/* CFG_GPMC_AD7_IN */
    	{0x030C, 2672, 0},	/* CFG_GPMC_AD8_IN */
    	{0x0318, 2334, 0},	/* CFG_GPMC_AD9_IN */
    	{0x06F0, 480, 0},	/* CFG_RGMII0_RXC_IN */
    	{0x06FC, 111, 1641},	/* CFG_RGMII0_RXCTL_IN */
    	{0x0708, 272, 1116},	/* CFG_RGMII0_RXD0_IN */
    	{0x0714, 243, 1260},	/* CFG_RGMII0_RXD1_IN */
    	{0x0720, 0, 1614},	/* CFG_RGMII0_RXD2_IN */
    	{0x072C, 105, 1673},	/* CFG_RGMII0_RXD3_IN */
    	{0x0740, 531, 120},	/* CFG_RGMII0_TXC_OUT */
    	{0x074C, 201, 60},	/* CFG_RGMII0_TXCTL_OUT */
    	{0x0758, 229, 120},	/* CFG_RGMII0_TXD0_OUT */
    	{0x0764, 141, 0},	/* CFG_RGMII0_TXD1_OUT */
    	{0x0770, 495, 120},	/* CFG_RGMII0_TXD2_OUT */
    	{0x077C, 660, 120},	/* CFG_RGMII0_TXD3_OUT */
    	{0x0A70, 1551, 115},	/* CFG_VIN2A_D12_OUT */
    	{0x0A7C, 816, 0},	/* CFG_VIN2A_D13_OUT */
    	{0x0A88, 876, 0},	/* CFG_VIN2A_D14_OUT */
    	{0x0A94, 312, 0},	/* CFG_VIN2A_D15_OUT */
    	{0x0AA0, 58, 0},	/* CFG_VIN2A_D16_OUT */
    	{0x0AAC, 0, 0},		/* CFG_VIN2A_D17_OUT */
    	{0x0AB0, 702, 0},	/* CFG_VIN2A_D18_IN */
    	{0x0ABC, 136, 976},	/* CFG_VIN2A_D19_IN */
    	{0x0AD4, 210, 1357},	/* CFG_VIN2A_D20_IN */
    	{0x0AE0, 189, 1462},	/* CFG_VIN2A_D21_IN */
    	{0x0AEC, 232, 1278},	/* CFG_VIN2A_D22_IN */
    	{0x0AF8, 0, 1397},	/* CFG_VIN2A_D23_IN */
    };
    
    const struct iodelay_cfg_entry iodelay_cfg_array_x15_sr2_0[] = {
    	{0x0114, 2519, 702},	/* CFG_GPMC_A0_IN */
    	{0x0120, 2435, 411},	/* CFG_GPMC_A10_IN */
    	{0x012C, 2379, 755},	/* CFG_GPMC_A11_IN */
    	{0x0198, 2384, 778},	/* CFG_GPMC_A1_IN */
    	{0x0204, 2499, 1127},	/* CFG_GPMC_A2_IN */
    	{0x0210, 2455, 1181},	/* CFG_GPMC_A3_IN */
    	{0x021C, 2486, 1039},	/* CFG_GPMC_A4_IN */
    	{0x0228, 2456, 938},	/* CFG_GPMC_A5_IN */
    	{0x0234, 2463, 573},	/* CFG_GPMC_A6_IN */
    	{0x0240, 2608, 783},	/* CFG_GPMC_A7_IN */
    	{0x024C, 2430, 656},	/* CFG_GPMC_A8_IN */
    	{0x0258, 2465, 850},	/* CFG_GPMC_A9_IN */
    	{0x0264, 2316, 301},	/* CFG_GPMC_AD0_IN */
    	{0x0270, 2324, 406},	/* CFG_GPMC_AD10_IN */
    	{0x027C, 2278, 352},	/* CFG_GPMC_AD11_IN */
    	{0x0288, 2297, 160},	/* CFG_GPMC_AD12_IN */
    	{0x0294, 2278, 108},	/* CFG_GPMC_AD13_IN */
    	{0x02A0, 2035, 0},	/* CFG_GPMC_AD14_IN */
    	{0x02AC, 2279, 378},	/* CFG_GPMC_AD15_IN */
    	{0x02B8, 2440, 70},	/* CFG_GPMC_AD1_IN */
    	{0x02C4, 2404, 446},	/* CFG_GPMC_AD2_IN */
    	{0x02D0, 2343, 212},	/* CFG_GPMC_AD3_IN */
    	{0x02DC, 2355, 322},	/* CFG_GPMC_AD4_IN */
    	{0x02E8, 2337, 192},	/* CFG_GPMC_AD5_IN */
    	{0x02F4, 2270, 314},	/* CFG_GPMC_AD6_IN */
    	{0x0300, 2339, 259},	/* CFG_GPMC_AD7_IN */
    	{0x030C, 2308, 577},	/* CFG_GPMC_AD8_IN */
    	{0x0318, 2334, 166},	/* CFG_GPMC_AD9_IN */
    	{0x0378, 0, 0},	/* CFG_GPMC_CS3_IN */
    	{0x0678, 0, 386},	/* CFG_MMC3_CLK_IN */
    	{0x0680, 605, 0},	/* CFG_MMC3_CLK_OUT */
    	{0x0684, 0, 0},	/* CFG_MMC3_CMD_IN */
    	{0x0688, 0, 0},	/* CFG_MMC3_CMD_OEN */
    	{0x068C, 0, 0},	/* CFG_MMC3_CMD_OUT */
    	{0x0690, 171, 0},	/* CFG_MMC3_DAT0_IN */
    	{0x0694, 0, 0},	/* CFG_MMC3_DAT0_OEN */
    	{0x0698, 0, 0},	/* CFG_MMC3_DAT0_OUT */
    	{0x069C, 221, 0},	/* CFG_MMC3_DAT1_IN */
    	{0x06A0, 0, 0},	/* CFG_MMC3_DAT1_OEN */
    	{0x06A4, 0, 0},	/* CFG_MMC3_DAT1_OUT */
    	{0x06A8, 0, 0},	/* CFG_MMC3_DAT2_IN */
    	{0x06AC, 0, 0},	/* CFG_MMC3_DAT2_OEN */
    	{0x06B0, 0, 0},	/* CFG_MMC3_DAT2_OUT */
    	{0x06B4, 474, 0},	/* CFG_MMC3_DAT3_IN */
    	{0x06B8, 0, 0},	/* CFG_MMC3_DAT3_OEN */
    	{0x06BC, 0, 0},	/* CFG_MMC3_DAT3_OUT */
    	{0x06F0, 260, 0},	/* CFG_RGMII0_RXC_IN */
    	{0x06FC, 0, 1412},	/* CFG_RGMII0_RXCTL_IN */
    	{0x0708, 123, 1047},	/* CFG_RGMII0_RXD0_IN */
    	{0x0714, 139, 1081},	/* CFG_RGMII0_RXD1_IN */
    	{0x0720, 195, 1100},	/* CFG_RGMII0_RXD2_IN */
    	{0x072C, 239, 1216},	/* CFG_RGMII0_RXD3_IN */
    	{0x0740, 89, 0},	/* CFG_RGMII0_TXC_OUT */
    	{0x074C, 15, 125},	/* CFG_RGMII0_TXCTL_OUT */
    	{0x0758, 339, 162},	/* CFG_RGMII0_TXD0_OUT */
    	{0x0764, 146, 94},	/* CFG_RGMII0_TXD1_OUT */
    	{0x0770, 0, 27},	/* CFG_RGMII0_TXD2_OUT */
    	{0x077C, 291, 205},	/* CFG_RGMII0_TXD3_OUT */
    	{0x0A70, 0, 0},	/* CFG_VIN2A_D12_OUT */
    	{0x0A7C, 219, 101},	/* CFG_VIN2A_D13_OUT */
    	{0x0A88, 92, 58},	/* CFG_VIN2A_D14_OUT */
    	{0x0A94, 135, 100},	/* CFG_VIN2A_D15_OUT */
    	{0x0AA0, 154, 101},	/* CFG_VIN2A_D16_OUT */
    	{0x0AAC, 78, 27},	/* CFG_VIN2A_D17_OUT */
    	{0x0AB0, 411, 0},	/* CFG_VIN2A_D18_IN */
    	{0x0ABC, 0, 382},	/* CFG_VIN2A_D19_IN */
    	{0x0AD4, 320, 750},	/* CFG_VIN2A_D20_IN */
    	{0x0AE0, 192, 836},	/* CFG_VIN2A_D21_IN */
    	{0x0AEC, 294, 669},	/* CFG_VIN2A_D22_IN */
    	{0x0AF8, 50, 700},	/* CFG_VIN2A_D23_IN */
    };
    
    const struct iodelay_cfg_entry iodelay_cfg_array_am572x_idk[] = {
    	{0x0114, 1861, 901},	/* CFG_GPMC_A0_IN */
    	{0x0120, 0, 0},	/* CFG_GPMC_A10_IN */
    	{0x012C, 1783, 1178},	/* CFG_GPMC_A11_IN */
    	{0x0138, 1903, 853},	/* CFG_GPMC_A12_IN */
    	{0x0144, 0, 0},	/* CFG_GPMC_A13_IN */
    	{0x0150, 2575, 966},	/* CFG_GPMC_A14_IN */
    	{0x015C, 2503, 889},	/* CFG_GPMC_A15_IN */
    	{0x0168, 2528, 1007},	/* CFG_GPMC_A16_IN */
    	{0x0170, 0, 0},	/* CFG_GPMC_A16_OUT */
    	{0x0174, 2533, 980},	/* CFG_GPMC_A17_IN */
    	{0x0188, 590, 0},	/* CFG_GPMC_A18_OUT */
    	{0x0198, 1652, 891},	/* CFG_GPMC_A1_IN */
    	{0x0204, 1888, 1212},	/* CFG_GPMC_A2_IN */
    	{0x0210, 1839, 1274},	/* CFG_GPMC_A3_IN */
    	{0x021C, 1868, 1113},	/* CFG_GPMC_A4_IN */
    	{0x0228, 1757, 1079},	/* CFG_GPMC_A5_IN */
    	{0x0234, 1800, 670},	/* CFG_GPMC_A6_IN */
    	{0x0240, 1967, 898},	/* CFG_GPMC_A7_IN */
    	{0x024C, 1731, 959},	/* CFG_GPMC_A8_IN */
    	{0x0258, 1766, 1150},	/* CFG_GPMC_A9_IN */
    	{0x0374, 0, 0},	/* CFG_GPMC_CS2_OUT */
    	{0x0590, 1000, 4200},	/* CFG_MCASP5_ACLKX_OUT */
    	{0x05AC, 800, 3800},	/* CFG_MCASP5_FSX_IN */
    	{0x06F0, 471, 0},	/* CFG_RGMII0_RXC_IN */
    	{0x06FC, 30, 1919},	/* CFG_RGMII0_RXCTL_IN */
    	{0x0708, 74, 1688},	/* CFG_RGMII0_RXD0_IN */
    	{0x0714, 94, 1697},	/* CFG_RGMII0_RXD1_IN */
    	{0x0720, 0, 1703},	/* CFG_RGMII0_RXD2_IN */
    	{0x072C, 70, 1804},	/* CFG_RGMII0_RXD3_IN */
    	{0x0740, 90, 70},	/* CFG_RGMII0_TXC_OUT */
    	{0x074C, 70, 70},	/* CFG_RGMII0_TXCTL_OUT */
    	{0x0758, 180, 70},	/* CFG_RGMII0_TXD0_OUT */
    	{0x0764, 35, 70},	/* CFG_RGMII0_TXD1_OUT */
    	{0x0770, 0, 0},	/* CFG_RGMII0_TXD2_OUT */
    	{0x077C, 180, 70},	/* CFG_RGMII0_TXD3_OUT */
    	{0x0A70, 65, 70},	/* CFG_VIN2A_D12_OUT */
    	{0x0A7C, 125, 70},	/* CFG_VIN2A_D13_OUT */
    	{0x0A88, 0, 70},	/* CFG_VIN2A_D14_OUT */
    	{0x0A94, 0, 70},	/* CFG_VIN2A_D15_OUT */
    	{0x0AA0, 65, 70},	/* CFG_VIN2A_D16_OUT */
    	{0x0AAC, 0, 0},	/* CFG_VIN2A_D17_OUT */
    	{0x0AB0, 612, 0},	/* CFG_VIN2A_D18_IN */
    	{0x0ABC, 4, 927},	/* CFG_VIN2A_D19_IN */
    	{0x0AD4, 136, 1340},	/* CFG_VIN2A_D20_IN */
    	{0x0AE0, 130, 1450},	/* CFG_VIN2A_D21_IN */
    	{0x0AEC, 144, 1269},	/* CFG_VIN2A_D22_IN */
    	{0x0AF8, 0, 1330},	/* CFG_VIN2A_D23_IN */
    	{0x0B30, 0, 0},	/* CFG_VIN2A_D5_OUT */
    };
    
    const struct iodelay_cfg_entry iodelay_cfg_array_am571x_idk[] = {
    	{0x0144, 0, 0},		/* CFG_GPMC_A13_IN */
    	{0x0150, 2062, 2277},	/* CFG_GPMC_A14_IN */
    	{0x015C, 1960, 2289},	/* CFG_GPMC_A15_IN */
    	{0x0168, 2058, 2386},	/* CFG_GPMC_A16_IN */
    	{0x0170, 0, 0},		/* CFG_GPMC_A16_OUT */
    	{0x0174, 2062, 2350},	/* CFG_GPMC_A17_IN */
    	{0x0188, 0, 0},		/* CFG_GPMC_A18_OUT */
    	{0x0374, 121, 0},       /* CFG_GPMC_CS2_OUT */
    	{0x06F0, 413, 0},       /* CFG_RGMII0_RXC_IN */
    	{0x06FC, 27, 2296},     /* CFG_RGMII0_RXCTL_IN */
    	{0x0708, 3, 1721},      /* CFG_RGMII0_RXD0_IN */
    	{0x0714, 134, 1786},    /* CFG_RGMII0_RXD1_IN */
    	{0x0720, 40, 1966},     /* CFG_RGMII0_RXD2_IN */
    	{0x072C, 0, 2057},      /* CFG_RGMII0_RXD3_IN */
    	{0x0740, 0, 60},        /* CFG_RGMII0_TXC_OUT */
    	{0x074C, 0, 60},        /* CFG_RGMII0_TXCTL_OUT */
    	{0x0758, 0, 60},        /* CFG_RGMII0_TXD0_OUT */
    	{0x0764, 0, 0},         /* CFG_RGMII0_TXD1_OUT */
    	{0x0770, 0, 60},        /* CFG_RGMII0_TXD2_OUT */
    	{0x077C, 0, 120},       /* CFG_RGMII0_TXD3_OUT */
    	{0x0A70, 0, 0},         /* CFG_VIN2A_D12_OUT */
    	{0x0A7C, 170, 0},       /* CFG_VIN2A_D13_OUT */
    	{0x0A88, 150, 0},       /* CFG_VIN2A_D14_OUT */
    	{0x0A94, 0, 0},         /* CFG_VIN2A_D15_OUT */
    	{0x0AA0, 60, 0},        /* CFG_VIN2A_D16_OUT */
    	{0x0AAC, 60, 0},        /* CFG_VIN2A_D17_OUT */
    	{0x0AB0, 530, 0},       /* CFG_VIN2A_D18_IN */
    	{0x0ABC, 71, 1099},     /* CFG_VIN2A_D19_IN */
    	{0x0AC8, 2229, 10},     /* CFG_VIN2A_D1_IN */
    	{0x0AD4, 142, 1337},    /* CFG_VIN2A_D20_IN */
    	{0x0AE0, 114, 1517},    /* CFG_VIN2A_D21_IN */
    	{0x0AEC, 171, 1331},    /* CFG_VIN2A_D22_IN */
    	{0x0AF8, 0, 1328},      /* CFG_VIN2A_D23_IN */
    };
    
    #endif
    #endif /* _MUX_DATA_BEAGLE_X15_H_ */
    

  • Please share dmesg logs with vip debug enabled. You can enable debug logs from vip using below command -

    echo 4 > /sys/module/ti_vip/parameters/debug

  • Hi,

    Please find the attached dmesg log with vip enable.

    Also please clarify my two doubts.

    1) The steps i am using above and the two files i am using for pinmux configuration are correct enough? or something more to be done.

    2) In mux_data.h file, Bydefault GPIO pins were declared as inputs-

    {MCASP1_AXR8, (M14 | PIN_INPUT)}, /* mcasp1_axr8.gpio5_10 for OSC_EN */
    {MCASP1_AXR9, (M14 | PIN_INPUT)}, /* mcasp1_axr9.gpio5_11 for CAM_PWRDN*/
    {MCASP1_AXR10, (M14 | PIN_INPUT)}, /* mcasp1_axr10.gpio5_12 for BUFF_EN*/
    {MCASP1_AXR11, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr11.gpio4_17 for RESET*/
    {GPIO6_11, (M0 | PIN_INPUT_PULLUP)}, /* gpio6_11.gpio6_11 used for Cam_En in LCD Module*/

    But i think these must be output from beagleboard to camera module. So i did change as-

    {GPMC_AD12, (M14 | PIN_OUTPUT)}, /* gpmc_ad12.OSC_EN gpio1_18*/
    {GPMC_AD13, (M14 | PIN_OUTPUT)}, /* gpmc_ad13.BUFF_EN gpio1_19*/
    {GPMC_AD14, (M14 | PIN_OUTPUT)}, /* gpmc_ad14.GPIO gpio1_20*/
    {GPMC_AD15, (M14 | PIN_OUTPUT)}, /* gpmc_ad15.CAM_PWR gpio1_21*/
    {GPMC_A13, (M14 | PIN_OUTPUT_PULLUP)}, /* gpmc_a13.gpio2_3 for Cam_En */

    Is this right?

    log_camera_vip.zip

  • Hi,

    after i ran yavta command,

    the dmesg log file is attached here-dmesg_vip_after_error.zip

  • Hi,
    This is a bit urgent and i am stuck at this point.
    Please bear with me. I will appreciate your help.
    Thanks.
  • Rahul,

    I missed earlier that you are not using LCD module and directly connecting the camera board to the P16 connector. The base board (beagle X15 board)  is not designed to connect the camera module directly to P16. i2c connectors are missing from P16. Please refer to the board schematics file available here to see the pin connections - www.ti.com/.../TMDSEVM572x Documents

    If you are using GPEVM, the LCD board is must to connect to the camera or else you can use AM5728/AM5718 IDK EVM if you do not want to use LCD module but would like to connect the camera to the base board directly.

    Regards,

    Manisha

  • Hello,
    I took consider of that already.
    I have configured the supported i2c pins of p16 header, also verified those i2c pins with an external i2c based sensor. The problem is with the 5 GPIOs. I have replaced the default GPIOs with others. You can verify the two files i sent you earlier "mux_data.h" and "am57xx-beagle-x15-common.dtsi". But those are not reflecting the output that i configured. I assigned proper pinmuxing but no result. How can i do that? How can i toggle GPIO of P16 header?
  • If i elaborate what i am doing, i made a small PCB which is used to connect the signals (i2c and GPIOs) from camera module with the Beagleboard X15 P16 header. So i have no issue with the hardware connection. Also not with i2c pins, they are configured correctly.
    Just want to know how can i configure new GPIOs rather than using default GPIOs. I have mentioned those GPIO also.
  • Hi,

    Any update?

  • Hi,

    I also checked the schematic of Beagleboard x-15 that is being used as AM57xx EVM.

    The pins that i am configuring as new GPIO (GPMC_AD12 to GPMC_AD15) are used as (VIN3A_D12 to VIN3A_D15).

    These pins are externally pulled up/pulled own with 10K resistor. Can this be the reason for not reflecting my changes in am57xx dts files?

  • Hi,

    I know you guys must be busy in dealing with other's queries also.

    I have provided all the data regarding my issue. Please bear with me to get this done. I think i am on the edge to make the camera up.

    Thanks.

  • Hello,

    It seems that this issue is discussed here:
    e2e.ti.com/.../2193908

    BR
    Margarita
  • Hi Margarita,

    That thread is separate from what i have asked here.
    There, a different approach is being asked to get the GPIO toggle.

    Here i am asking that my i2c drivers are loaded successfully, But not able to run the camera.
    I have discussed the steps and logs that i got. What am i doing wrong? Please suggest me if i am doing something wrong in my steps.

    Also please clarify me in this particular one -
    To configure the new GPIOs of P16 header, are only two files are required?( mux_data.h and am57xx-beagle-x15-common.dtsi).

    Thanks.
  • Hi,

    Any update?

  • mux_data.c and the .dtsi file should be all that need to change. Can you stop in u-boot and use the md.l command to look at the pinmux for the GPIO you are using to make sure it's muxed for GPIO? Then same when you boot the kernel but use devmem2 to dump the register.

    Steve K.

  • Hi Steve,

    Please find the logs.

    Are those pins are being reset after boot?

    md.l logs.zip