Part Number: TMDXIDK5728
Tool/software: TI-RTOS
Hi,
I am working on AM572x IDK. We are using the on board QSPI flash with PDK 3.3. We have cache enabled in the MMU settings for the QSPI flash with attribute setting as follows in the cfg file
Mmu.initDescAttrsMeta(attrs1); attrs1.type = Mmu.DescriptorType_BLOCK; // BLOCK descriptor attrs1.shareable = 2; // sharerable attrs1.attrIndx = 2; // Cached, normal memory
We are using the Flash API's provided in the PDK for AM572x IDK. The requirement here is to have the flash with cache enabled but we need the data to written back to flash on write. Therefore we are calling the cache_wb() instruction after every write.
The write to the flash happens in chunk of 256 bytes. The issues seen is after writing 256 bytes when we call cache_wb, only the first 64 bytes are written back to the flash and remaining 192 bytes are all 0xFF (default erase state of flash bytes).
Other option we looked into was enabling cache for flash in write through mode. According to the sysbios documentation I need to update the MAIRx values for this. But when I checked the ARM A15 documentation, there is no documentation on what values to set for A15's MAIRx in write-though mode.
Any help here would be really helpful.
Thanks
Regards,
Manmohan