Other Parts Discussed in Thread: SYSBIOS
Tool/software: TI-RTOS
SYS/BIOS : 6.42.2.29
base application : EtherCAT full feature example + motor_control
my goal : running application in "L3 build"
Hi,
I have a question about linker setting.
I tried to run the application on L2(as SRAM).
With SPRAC45, I made platform setting, compiling works well.
When the application is small enough to fit in L2SRAM, it has no error.
But the size application code data exceeds the L2SRAM, I couldn't make ".out" file.
My application size is 362KB,(I checked it by XIP build) and OCMCRAM has 128KB + L2SRAM has 256KB.
So I have 384KB, I think it's possible to load application.
Then I need to rearrange application sections, how could I get it?
I tried *(EXCLUDE_FILE(objectfile.o) .text.objectfile) in .text section(in ~~~.xdt file), but the size exceeded is same as before.
Did I missed something? or I should try more objectfiles?
Thank you.