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AM5728: RTOS startup and reset errors

Part Number: AM5728

Dear TI,

     I am using the AM572x evaluation module and while it is generally working I am observing probably 3 communication related issues with the cores.

General background:

I am using the SD disk in the board so it 'starts up' on its own.

Then I am using Target Configuration and launching my target configuration

I am using a spectrum digital XDS2xx USB debug probe

Once connected I am connecting to the CORTEXA15_0 core, then connecting a DSP C66x (DSP1)

Issue 1:

When I launch the configuration I get:

Cortex_M4_IPU1_C0: GEL Output: --->>> AM572x Cortex M4 Startup Sequence In Progress... <<<---
Cortex_M4_IPU1_C0: GEL Output: --->>> AM572x Cortex M4 Startup Sequence DONE! <<<---
Cortex_M4_IPU1_C1: GEL Output: --->>> AM572x Cortex M4 Startup Sequence In Progress... <<<---
Cortex_M4_IPU1_C1: GEL Output: --->>> AM572x Cortex M4 Startup Sequence DONE! <<<---
Cortex_M4_IPU2_C0: GEL Output: --->>> AM572x Cortex M4 Startup Sequence In Progress... <<<---
Cortex_M4_IPU2_C0: GEL Output: --->>> AM572x Cortex M4 Startup Sequence DONE! <<<---
Cortex_M4_IPU2_C1: GEL Output: --->>> AM572x Cortex M4 Startup Sequence In Progress... <<<---
Cortex_M4_IPU2_C1: GEL Output: --->>> AM572x Cortex M4 Startup Sequence DONE! <<<---
C66xx_DSP1: GEL Output: --->>> AM572x C66x DSP Startup Sequence In Progress... <<<---
C66xx_DSP1: GEL Output: --->>> AM572x C66x DSP Startup Sequence DONE! <<<---
C66xx_DSP2: GEL Output: --->>> AM572x C66x DSP Startup Sequence In Progress... <<<---
C66xx_DSP2: GEL Output: --->>> AM572x C66x DSP Startup Sequence DONE! <<<---
CortexA15_0: GEL Output: --->>> AM572x Cortex A15 Startup Sequence In Progress... <<<---
CortexA15_0: GEL Output: --->>> AM572x Cortex A15 Startup Sequence DONE! <<<---
CortexA15_1: GEL Output: --->>> AM572x Cortex A15 Startup Sequence In Progress... <<<---
CortexA15_1: GEL Output: --->>> AM572x Cortex A15 Startup Sequence DONE! <<<---

When I connect to the A15_0 core I get:

IcePick_D: GEL Output: Ipu RTOS is released from Wait-In-Reset.
IcePick_D: GEL Output: Ipu SIMCOP is released from Wait-In-Reset.
IcePick_D: GEL Output: IVAHD C66 is released from Wait-In-Reset.
IcePick_D: GEL Output: IVAHD ICONT1 is released from Wait-In-Reset.
IcePick_D: GEL Output: IVAHD ICONT2 is released from Wait-In-Reset.
CS_DAP_DebugSS: GEL Output: --->>> CONFIGURE DEBUG DPLL settings to 1.9 GHZs  <<<---
CS_DAP_DebugSS: GEL Output: DEBUGSS DPLL is already locked, nothing done 
CS_DAP_DebugSS: GEL Output: --->>> TURNING ON L3_INSTR and L3_3 clocks required for debug instrumention <<<<<<----
CS_DAP_DebugSS: GEL Output: ---<<< L3 instrumentation clocks are enabled >>>> ---
CS_DAP_DebugSS: GEL Output: --->>> Mapping TIMER supsend sources to default cores <<<<<<----
CS_DAP_PC: GEL Output: Cortex-A15 1 is not in WIR mode so nothing to do.
CortexA15_0: GEL Output: --->>> AM572x GP EVM <<<---
CortexA15_0: GEL Output: --->>> AM572x Target Connect Sequence Begins ... <<<---
CortexA15_0: GEL: Error while executing OnTargetConnect(): Target failed to read 0x4A0025F4
  at (*((unsigned int *) 0x4A0025F4)&0xFFF) [AM572x_startup_common.gel:69]
  at AM57xx_EVM_Initialization(0) [gpevm_am572x.gel:54]
  at OnTargetConnect()

So issue 1 is the last error... while executing OnTarget connect.  I use the memory window and it can read that address.

It says you have CTRL_MODULE_CORE_CTRL_CORE_STD_FUSE_OPP_CORE_2 values stored at that location.

While it reports this error I don't observe any issues at this time... other than it reports this error.  I am however not using the CortexA15 core at all at this time.  But in case its the cause of my other problems... 

ISSUE2:  (Main issue) has two problems.

I load a very simple test program on the C66x part:

#define ROWS 12
#define COLS 12

int main(void)
{
    int rows = ROWS;
    int cols = COLS;
//    float A[ROWS*COLS*2] = { 1, 1, 1, 1, 1, 1, 1, 1 };
    float A[ROWS*COLS*2] = {
                          1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
                          1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
                          1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
                          1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,

                          1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
                          1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
                          1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
                          1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,

                          1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
                          1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
                          1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
                          1,1,1,1,1,1,1,1,1,1,1,1,1};

    float U[ROWS*2*ROWS];
    float V[COLS*2*COLS];
    float U1[COLS*COLS*2];
    float diagonal[COLS*2];
    float superdiag[COLS*2];

    DSPF_sp_svd_cmplx(rows, cols, &A[0], &U[0], &V[0], &U1[0], &diagonal[0], &superdiag[0]);

 return 0;
}

When I run the above with a 2x2 matrix everything works...  and I have run it with a 24x24 matrix, but for some reason now it is giving me one of two errors (varies each time I run)

error 1 is the dsp gets reset, in which case it returns control to me

error 2:

C66xx_DSP1: Trouble Halting Target CPU: (Error -1060 @ 0x0) Device is not responding to the request. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 6.0.628.3)

Sometimes it gives me this error, or a variety of other errors related to not being able to communicate with the core.

I have read various similar issues and was led to one site that lists know issues.  When I get error 2 if I run a communication test is fails, and from reading the known set of issues it says windows will sometimes loose communication with my XDS200 and just changing USB ports to re-initialize the communication will solve the problem.  So when I see an error 2 type of problem, I can re-establish communication by moving the USB port.  I of course have to re-launch the configuration and reconnect, but this 'unjams' it.

so the question here is, what might be causing the DSP to reset in error1?  Could it be related to the ARM15_0 error?  Once while I was distracted I noticed that after connecting to the ARM15_0 and the error message... I left my computer and when I came back there was a timeout/reset message related to the ARM... so I'm wondering if perhaps the ARM15_0 being master is resetting for some reason causing error 1 on the DSP maybe?  (don't know)  Open to input on why the DSP might be resetting.

Since I did get a 24x24 matrix to run I don't think this is code related, but for some reason now, in the time it takes to run a 24x24 matrix SVD this reset is happening... this is why when I run just a smaller 2x2 it works fine... 12x12 isn't working either at the moment (ie: either communication is lost or the DSP resets before it completes I assume)...

Any insight would be appreciated.

  • The RTOS team have been notified. They will respond here.
  • Are you using the SD card that came with the Kit or have you created a SD card using Processor SDK Linux to keep this device on. 

    Please note that the SD card from Linux SDK will boot up the entire Linux kernel on the A15 cores and will enable MMU and memory map as specified  in Linux. the emulation has no way to understand the update the MMU settings so there may be some issues for the core to access some sections of memory. Is it possible for you to halt the linux boot at u-boot (secondary bootloader) and then try to connect to the A15 or the C66x cores. 

    We have described how to connect to this evaluation platform in the HArdware setup guide here:

    Can you follow these steps and let us know if you are still running into these issues.

    Regards,

    Rahul

  • I am using the SD card that was supplied.

    I am currently running ccsv7 on windows 10 (not Linux)

    As such I'm not sure I know what you mean by halt the Linux boot at u-boot.  I'm not a Linux person unfortunately.

    I am following the guide you have pointed to me.  When booting with the SD disk supplied, and using the AM5728 launch configuration as per the setup, it connects fine.  However when I run my test program it starts running and then I loose contact with it:

    C66xx_DSP1: Trouble Halting Target CPU: (Error -1060 @ 0x0) Device is not responding to the request. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 6.0.628.3)

    This led me to select the evaluation module configuration, and I verified all the GEL files as per the link you gave me... however I applied that to when it was booting from the SD card.  The information I gave you is the response when I applied the evmBoard configuration for the AM5728,

    It's a little bit inpractical to try and time the connection and the starting of the board, but I can certainly try that method, however since the first method using the AM5728 and allowing it to boot with the SD should work?  why am I loosing communication with the C66x when I run a longer version of the SVD from DSPLIB as a test case?

    I have tried lowering the TCLK freq as it suggests with no change.

  • Rob,

    The SD card that comes with the EVM kit is shipped with embedded linux boot images so I was referring to the images on the SD card and not your host environment. How did you create the SD card ? We have some such issue when the SD cards has Processor SDK Linux images.

    If you have a MLO file on the SD card from Processor SDK RTOS then you shouldn`t have this issue and I am not sure why you get the error when running the SVD code from DSPLIB. One other thing to check is the linker command file used to build the application image. Can you look to see that all the code is running from DSP L2 memory and not from shared memory or DDR memory??

    Regards,
    Rahul
  • Rob,

    Can you remove the supplied SD card and connect the A15 of EVM with default GEL files? Then the C66x cores following processors.wiki.ti.com/.../AM572x_GP_EVM_Hardware_Setup Topic: Connect without a SD card boot image.

    Make sure the GEL file runs correctly then load your DSPF test code to see if DSP loss again?

    Regards, Eric
  • Sorry, I can see the confusion in my response, but it remains the same.

    yes I am using the SD card as it was sent to us, no changes, no compilation of the Linux SDK has been done by us or RTOS, we just received the board this week and are going through the learning process to learn your product (AM5728)

    The SD card when booted and connected to the display displays some of the various test applications that perform some benchmarks etc.  That is what is connected at this time.

    If we are required to create our own SD card it has not been done at this time.

    I check the linker cmd file and indeed the default cmd file generated was not he correct DSP memory map.  I updated it to put the code in DSP L2 memory, however after changing the linker cmd file, when I attempt to load the file, code composer completely shuts down.  I will investigate this error by going back to the default cmd file and restarting everything to try and determine what brought this behavoiur on.

    I also tried removing the SD card as was suggested and I:

    1.  Launch the configuration with the correct GEL files

    2.  Press the power on button and immediately press connect the Cortex A15_0

    What I observe is that it starts the procedure, but you see the LED go off when it gets as far as shown below.

    I can't start the connection process before I presss power on, so you'll have to let me know what else I can try that route, as its as if it can't complete the startup process before it times out ( itleast that is how I interpret the message below.

    IcePick_D: GEL Output: Ipu RTOS is released from Wait-In-Reset.
    IcePick_D: GEL Output: Ipu SIMCOP is released from Wait-In-Reset.
    IcePick_D: GEL Output: IVAHD C66 is released from Wait-In-Reset.
    IcePick_D: GEL Output: IVAHD ICONT1 is released from Wait-In-Reset.
    IcePick_D: GEL Output: IVAHD ICONT2 is released from Wait-In-Reset.
    CS_DAP_DebugSS: GEL Output: --->>> CONFIGURE DEBUG DPLL settings to 1.9 GHZs  <<<---
    CS_DAP_DebugSS: GEL Output: > Setup DebugSS 1.9GHz in progress...
    CS_DAP_DebugSS: GEL Output: < Done with Setup DebugSS Trace export clock (TPIU) to 97MHz
    CS_DAP_DebugSS: GEL Output: < Done with Setup DebugSS PLL Clocking 1.9GHz
    CS_DAP_DebugSS: GEL Output: < Done with Setup DebugSS ATB Clocking 380MHz
    CS_DAP_DebugSS: GEL Output: < Done with Setup DebugSS Trace export clock (TPIU) to 97MHz
    CS_DAP_DebugSS: GEL Output: --->>> TURNING ON L3_INSTR and L3_3 clocks required for debug instrumention <<<<<<----
    CS_DAP_DebugSS: GEL Output: ---<<< L3 instrumentation clocks are enabled >>>> ---
    CS_DAP_DebugSS: GEL Output: --->>> Mapping TIMER supsend sources to default cores <<<<<<----
    CS_DAP_PC: GEL Output: Cortex-A15 1 is not in WIR mode so nothing to do.

  • So some good news. By removing the SD card, if I time it just right, ie: I press connect to target A15_0, then press the physical reset button on the board shortly after, It goes through the complete boot process (GEL files) and the LED stays on the board.

    At this point I can connect to the DSP. It's a bit touchy on the timing though, but I've gotten it to work multiple times and it's obvious when it fails, so I can try again. No doubt your working on improving this. 8-)

    it still jams up when running the DSP code once booted this way. (no SD card)

    My thinking is that the DSP jamming is probably related to the Cmd file as you suggest and is a separate problem from the booting.

    The default cmd file puts everything in OCMC_RAM1 located at OCMC_RAM1: o = 0x40300000 l = 0x00080000 /* 512kB L3 OCMC SRAM1 */

    As I am new to the part I am not familiar with all the sections it's list, obviously the ones like .text .bss etc I am, but do you have a basic cmd file I could use until I have time to step through what each section is?

    If I just change all sections to point to DSP L2 ram it causes it to 'crash' code composer studio when I select RUN|Load program... the dialog to select the program to load very briefly appears on the screen then code composer just completely disappears... (no error dialog or anything it just ceases to exist)

    I can't see why even if I inappropriately changed the cmd file to point to wrong locations, since I haven't loaded it yet, why that would cause code composer to crash before it allows me to send the code to the part, doesn't make sense... but if I set it topoint back to the OCMC_RAM1 location, then code composer isn't crashing. ie: it will allow me to load the default cmd file compiled code all pointing all sections to OCMC_RAM1, but if I add the following:

    /* IRAM_MEM: o = 0x00800000 l = 0x00008000 */ /* 32kB internal SRAM */
    OCMC_RAM1: o = 0x40300000 l = 0x00080000 /* 512kB L3 OCMC SRAM1 */
    OCMC_RAM2: o = 0x40400000 l = 0x00100000 /* 1MB L3 OCMC SRAM2 */
    OCMC_RAM3: o = 0x40500000 l = 0x00100000 /* 1MB L3 OCMC SRAM3 */
    DDR0: o = 0x80000000 l = 0x40000000 /* 1GB external DDR Bank 0 */

    DSP_L2: o = 0x00800000 l = 0x00047ff /* 288kb */

    and then point even just .text to DSP_L2 (or if I point everything to DSP_L2) it causes this behavior in code composer, or so it appears at this time.

    Thanks for any input you can supply.
  • So, I'm not seeing the code composer crash at this time. (not sure why)

    I am successfully connecting to the part using the gpevm_am572x_sireva with gel files, if I do the connect then press the power button (but I still sometimes have to try more than once if I get the timing wrong, but it works most of the time.

    Once connected I can now connect to and load the dsp with a compiled image using the below linker file.

    When I run the test DSP lib SVD function, I still get the :

    C66xx_DSP1: Trouble Halting Target CPU: (Error -1060 @ 0x0) Device is not responding to the request. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 6.0.628.3)

    error message.

    Any thoughts?

    MEMORY
    {
    /* IRAM_MEM: o = 0x00800000 l = 0x00008000 */ /* 32kB internal SRAM */
    OCMC_RAM1: o = 0x40300000 l = 0x00080000 /* 512kB L3 OCMC SRAM1 */
    OCMC_RAM2: o = 0x40400000 l = 0x00100000 /* 1MB L3 OCMC SRAM2 */
    OCMC_RAM3: o = 0x40500000 l = 0x00100000 /* 1MB L3 OCMC SRAM3 */
    DDR0: o = 0x80000000 l = 0x40000000 /* 1GB external DDR Bank 0 */

    DSP_L2: o = 0x00800000 l = 0x00047ff /* 288kb */
    DSP_L1P: o = 0x00e00000 l = 0x00007fff /* 32kb */
    DSP_L1D: o = 0x00f00000 l = 0x00007fff /* 32kb */
    /* DSP_L3: o = 0x14000000 l = 0xffffffff *//* 3.8GB */
    /* DSP_L4: o = 0x08020000 l = 0x */

    }

    SECTIONS
    {
    .text > DSP_L2
    .stack > DSP_L2
    .bss > DSP_L2
    .cio > DSP_L2
    .const > DSP_L2
    .data > DSP_L2
    .switch > DSP_L2
    .sysmem > DSP_L2
    .far > DSP_L2
    .args > DSP_L2
    .ppinfo > DSP_L2
    .ppdata > DSP_L2

    /* COFF sections */
    .pinit > DSP_L2
    .cinit > DSP_L2

    /* EABI sections */
    .binit > DSP_L2
    .init_array > DSP_L2
    .neardata > DSP_L2
    .fardata > DSP_L2
    .rodata > DSP_L2
    .c6xabi.exidx > DSP_L2
    .c6xabi.extab > DSP_L2

    }
  • Rob,

    Can you provide, your DSPLIB SVD binary and the map file here so that we can try this on our EVM setup and provide appropriate guidance.

    Just FYI: To work around the PMIC shutdown issue without using SD card you can short J5 connectors.
    processors.wiki.ti.com/.../AM572x_General_Purpose_EVM_HW_User_Guide

    Use this with caution and make sure that you run the GEL or SD card if you choose to short the connector.

    Regards,
    Rahul
  • Rahul & Erik,

    Thanks very much, I had made a small mistake in my test code. I had the defines set to 12x12, but only initialized it for 2x2. upon assigning all sections to DSPL2 memory and correcting my typo, I have gotten it to work reliably all the way to 24x24...

    SUMMARY:
    since I was switching between 2x2, 12x12, and 24x24 as test cases between the time I switched to the DSPL2 memory I had accidentally left it with uninitialized memory in the 12x12 case. With the fix of switching it to DSPL2 memory and the no SD cared boot, everything is working reliably. The code composer crash issue has not resurfaced since I rebooted the computer/code composer completely. I'll let you know if I see it again, at this time everything is working as you say it should.

    Thanks for the help getting going with this new processor, It will take some time to become familiar with the new resources this part has to offer.
  • Thanks for updating us on your progress. We are glad we could be of help. For the time being, I am closing this post.
    Please open a new E2E thread if you have any further questions in getting setup on this platform.

    Regards,
    Rahul
  • Sorry, It did work and without change now it isn't. It seems to work better with the smaller say 2x2 case, but it's failing on 12x12 at the moment. Essentially when I run the svd it never returns and I loose communication.

    How do you wish me to provide you the SVD binary? (File Transfer) I can post the map file easily enough.
  • Can you zip the out and the map file and attach it here.

    Regards,
    Rahul
  • I can zip them up but I don't see a button anywhere in this interface to attach it. How to I attach it in this interface?
  • Rob,

    when you hit reply, switch to Rich Editor using the option provided on the bottom right corner of your reply. This will show full range of Rich Editor options which provides an option to attach files and insert images etc.
  • Okay, I tried to send it to you via 'private message' as there is an attach paperclip icon there. However it says an error occurred and was logged. I tired twice to be sure.
  • This is the test code that is compiled into the above, just a quick test code to try 2x2, 12x12, and 24x24 test case.

    #include "dsplib.h"

    #define ROWS 12
    #define COLS 12


    int main(void)
    {
    int rows = ROWS;
    int cols = COLS;
    // float A[ROWS*COLS*2] = { 1, 1, 1, 1, 1, 1, 1, 1 };
    float A[ROWS*COLS*2] = {
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,

    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,

    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1};
    /* 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,

    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,

    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,

    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,

    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,

    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,

    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,

    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,

    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,

    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
    1,1};*/
    float U[ROWS*2*ROWS];
    float V[COLS*2*COLS];
    float U1[COLS*COLS*2];
    float diagonal[COLS*2];
    float superdiag[COLS*2];

    DSPF_sp_svd_cmplx(rows, cols, &A[0], &U[0], &V[0], &U1[0], &diagonal[0], &superdiag[0]);


    return 0;
    }
  • I tried a different DSPLIB function and I tried stepping into the functions and it still looses communication as soon as I do, so It has nothing specific with the SVD, or stepping over.  It successfully does a memcpy to initialize the variable, but as soon as it calls the DSPLIB function something happens that causes it to loose communication?

  • I cut and paste the function(s) from the DSP lib src directory, and used the lnk.cmd file in the DSPlib src directory, and upon doing so I consistently have the functions run when I compile them myself.

    I'm not sure why is differs from linking in the library version of it?

    the lnk.cmd file only lists:

    -heap 0x8000
    -stack 0xC000

    MEMORY
    L2SRAM (RWX) : org = 0x0800000, len = 0x80000
    MSMCSRAM (RWX): org = 0xc000000, len = 0x200000

    SECTIONS
    .text: load >> L2SRAM
    .text:touch: load >> L2SRAM

    GROUP (NEAR_DP)
    {
    .neardata
    .rodata
    .bss
    } load > L2SRAM

    .init_array: load >> L2SRAM
    .far: load >> MSMCSRAM
    .fardata: load >> L2SRAM
    .neardata load >> L2SRAM
    .rodata load >> L2SRAM
    .data: load >> L2SRAM
    .switch: load >> L2SRAM
    .stack: load > L2SRAM
    .args: load > L2SRAM align = 0x4, fill = 0 {_argsize = 0x200; }
    .sysmem: load > L2SRAM
    .cinit: load > L2SRAM
    .const: load > L2SRAM START(const_start) SIZE(const_size)
    .pinit: load > L2SRAM
    .cio: load >> L2SRAM
    xdc.meta: load >> L2SRAM, type = COPY