Dear TI,
I am using the AM572x evaluation module and while it is generally working I am observing probably 3 communication related issues with the cores.
General background:
I am using the SD disk in the board so it 'starts up' on its own.
Then I am using Target Configuration and launching my target configuration
I am using a spectrum digital XDS2xx USB debug probe
Once connected I am connecting to the CORTEXA15_0 core, then connecting a DSP C66x (DSP1)
Issue 1:
When I launch the configuration I get:
Cortex_M4_IPU1_C0: GEL Output: --->>> AM572x Cortex M4 Startup Sequence In Progress... <<<---
Cortex_M4_IPU1_C0: GEL Output: --->>> AM572x Cortex M4 Startup Sequence DONE! <<<---
Cortex_M4_IPU1_C1: GEL Output: --->>> AM572x Cortex M4 Startup Sequence In Progress... <<<---
Cortex_M4_IPU1_C1: GEL Output: --->>> AM572x Cortex M4 Startup Sequence DONE! <<<---
Cortex_M4_IPU2_C0: GEL Output: --->>> AM572x Cortex M4 Startup Sequence In Progress... <<<---
Cortex_M4_IPU2_C0: GEL Output: --->>> AM572x Cortex M4 Startup Sequence DONE! <<<---
Cortex_M4_IPU2_C1: GEL Output: --->>> AM572x Cortex M4 Startup Sequence In Progress... <<<---
Cortex_M4_IPU2_C1: GEL Output: --->>> AM572x Cortex M4 Startup Sequence DONE! <<<---
C66xx_DSP1: GEL Output: --->>> AM572x C66x DSP Startup Sequence In Progress... <<<---
C66xx_DSP1: GEL Output: --->>> AM572x C66x DSP Startup Sequence DONE! <<<---
C66xx_DSP2: GEL Output: --->>> AM572x C66x DSP Startup Sequence In Progress... <<<---
C66xx_DSP2: GEL Output: --->>> AM572x C66x DSP Startup Sequence DONE! <<<---
CortexA15_0: GEL Output: --->>> AM572x Cortex A15 Startup Sequence In Progress... <<<---
CortexA15_0: GEL Output: --->>> AM572x Cortex A15 Startup Sequence DONE! <<<---
CortexA15_1: GEL Output: --->>> AM572x Cortex A15 Startup Sequence In Progress... <<<---
CortexA15_1: GEL Output: --->>> AM572x Cortex A15 Startup Sequence DONE! <<<---
When I connect to the A15_0 core I get:
IcePick_D: GEL Output: Ipu RTOS is released from Wait-In-Reset.
IcePick_D: GEL Output: Ipu SIMCOP is released from Wait-In-Reset.
IcePick_D: GEL Output: IVAHD C66 is released from Wait-In-Reset.
IcePick_D: GEL Output: IVAHD ICONT1 is released from Wait-In-Reset.
IcePick_D: GEL Output: IVAHD ICONT2 is released from Wait-In-Reset.
CS_DAP_DebugSS: GEL Output: --->>> CONFIGURE DEBUG DPLL settings to 1.9 GHZs <<<---
CS_DAP_DebugSS: GEL Output: DEBUGSS DPLL is already locked, nothing done
CS_DAP_DebugSS: GEL Output: --->>> TURNING ON L3_INSTR and L3_3 clocks required for debug instrumention <<<<<<----
CS_DAP_DebugSS: GEL Output: ---<<< L3 instrumentation clocks are enabled >>>> ---
CS_DAP_DebugSS: GEL Output: --->>> Mapping TIMER supsend sources to default cores <<<<<<----
CS_DAP_PC: GEL Output: Cortex-A15 1 is not in WIR mode so nothing to do.
CortexA15_0: GEL Output: --->>> AM572x GP EVM <<<---
CortexA15_0: GEL Output: --->>> AM572x Target Connect Sequence Begins ... <<<---
CortexA15_0: GEL: Error while executing OnTargetConnect(): Target failed to read 0x4A0025F4
at (*((unsigned int *) 0x4A0025F4)&0xFFF) [AM572x_startup_common.gel:69]
at AM57xx_EVM_Initialization(0) [gpevm_am572x.gel:54]
at OnTargetConnect()
So issue 1 is the last error... while executing OnTarget connect. I use the memory window and it can read that address.
It says you have CTRL_MODULE_CORE_CTRL_CORE_STD_FUSE_OPP_CORE_2 values stored at that location.
While it reports this error I don't observe any issues at this time... other than it reports this error. I am however not using the CortexA15 core at all at this time. But in case its the cause of my other problems...
ISSUE2: (Main issue) has two problems.
I load a very simple test program on the C66x part:
#define ROWS 12
#define COLS 12
int main(void)
{
int rows = ROWS;
int cols = COLS;
// float A[ROWS*COLS*2] = { 1, 1, 1, 1, 1, 1, 1, 1 };
float A[ROWS*COLS*2] = {
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
1,1,1,1,1,1,1,1,1,1,1,1,1};
float U[ROWS*2*ROWS];
float V[COLS*2*COLS];
float U1[COLS*COLS*2];
float diagonal[COLS*2];
float superdiag[COLS*2];
DSPF_sp_svd_cmplx(rows, cols, &A[0], &U[0], &V[0], &U1[0], &diagonal[0], &superdiag[0]);
return 0;
}
When I run the above with a 2x2 matrix everything works... and I have run it with a 24x24 matrix, but for some reason now it is giving me one of two errors (varies each time I run)
error 1 is the dsp gets reset, in which case it returns control to me
error 2:
C66xx_DSP1: Trouble Halting Target CPU: (Error -1060 @ 0x0) Device is not responding to the request. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 6.0.628.3)
Sometimes it gives me this error, or a variety of other errors related to not being able to communicate with the core.
I have read various similar issues and was led to one site that lists know issues. When I get error 2 if I run a communication test is fails, and from reading the known set of issues it says windows will sometimes loose communication with my XDS200 and just changing USB ports to re-initialize the communication will solve the problem. So when I see an error 2 type of problem, I can re-establish communication by moving the USB port. I of course have to re-launch the configuration and reconnect, but this 'unjams' it.
so the question here is, what might be causing the DSP to reset in error1? Could it be related to the ARM15_0 error? Once while I was distracted I noticed that after connecting to the ARM15_0 and the error message... I left my computer and when I came back there was a timeout/reset message related to the ARM... so I'm wondering if perhaps the ARM15_0 being master is resetting for some reason causing error 1 on the DSP maybe? (don't know) Open to input on why the DSP might be resetting.
Since I did get a 24x24 matrix to run I don't think this is code related, but for some reason now, in the time it takes to run a 24x24 matrix SVD this reset is happening... this is why when I run just a smaller 2x2 it works fine... 12x12 isn't working either at the moment (ie: either communication is lost or the DSP resets before it completes I assume)...
Any insight would be appreciated.