AM4379: DDR address line noise

Biser,

Thanks for your comment!
I will check that there is no issue on AM437x in other board.
So will return when I finished.

Best regards, RY

- TMDXSK437X board does not use Parallel termination on the Addr/Ctrl lines. It uses a balanced T-topology for the DDR interface for the Addr/Ctrl lines. Therefore, it is unclear to me if you are referring to termination resistor on the TI board or your board

- Does your implementation use parallel termination (VTT) termination on the Addr/Ctrl lines? If so, this would be a different implementation than the TI SK board as mentioned above

- With regards to the noise you measured, it is unclear where you are measuring - close to the DRAM or the processor? The measurement looks like on the TI board. How does this measurement match with your board. I'm unable to see the correlation of this noise on your board vs. TI board

- The noise you are measuring is <200mV which is well within the VIH(min) of the Addr/Ctrl lines for the DRAM. Is this the same level of noise you measure on your board? If it is <200mV, this should not be the source of read/write errors

- How did you arrive the noise on the Addr/Ctrl lines is the source of the read/write error? Did you verify if all the DDR settings and configuration is fine?

- without assessing the real issue, changing the termination resistor to 100 ohm might not solve the issue

Regards, Siva

Hi, Siva.
Thanks for your response.

sivak said:

- TMDXSK437X board does not use Parallel termination on the Addr/Ctrl lines. It uses a balanced T-topology for the DDR interface for the Addr/Ctrl lines. Therefore, it is unclear to me if you are referring to termination resistor on the TI board or your board

Thanks. We are referring the customer's target board.

sivak said:

- Does your implementation use parallel termination (VTT) termination on the Addr/Ctrl lines? If so, this would be a different implementation than the TI SK board as mentioned above

Yes.
So I have a question.
You do NOT recommend to use parallel termination (VTT) with AM437x and DDR3L?

sivak said:

- With regards to the noise you measured, it is unclear where you are measuring - close to the DRAM or the processor? The measurement looks like on the TI board. How does this measurement match with your board. I'm unable to see the correlation of this noise on your board vs. TI board

We can see the noise both on the target board and SK.
Measure point is R107 on SK which is close to the Processor.

sivak said:

- The noise you are measuring is <200mV which is well within the VIH(min) of the Addr/Ctrl lines for the DRAM. Is this the same level of noise you measure on your board? If it is <200mV, this should not be the source of read/write errors

I agree with you.
Thanks for your comment.
I will check it to the customer.

sivak said:

- How did you arrive the noise on the Addr/Ctrl lines is the source of the read/write error? Did you verify if all the DDR settings and configuration is fine?

We can see the error as following:

When write to address 0x80000000, Value changes on address 0x80000004.
When write to address 0x80000004, Value changes on address 0x80000008.
When write to address 0x80000008, Value changes on address 0x8000000C.
When write to address 0x8000000C, no changes.

We have already verified the DDR regs. on AM437x.
Since SK can work with same configuration as target board, we think our DDR setting is fine.

sivak said:

- without assessing the real issue, changing the termination resistor to 100 ohm might not solve the issue

We use 50ohm as parallel termination resister.
It is specified as Zo on datasheet. Is that any problems?

SPRS851D (P180) Table 5-53. PCB Stackup Specifications

Best regards,
Ryutaro Yoshida

Yoshida-san

#1 OK. Thanks for clarifying. So, the customer board uses VTT termination. Correct? I'm not sure then why you are comparing with TI SK board. Can you please clarify why you are comparing with SK board?

#2 I'm not recommending to remove the VTT termination. I want to clarify that TI SK board uses a different topology. TI GP EVM uses VTT termination, if you are looking for a TI board with VTT termination. All the supported memory configuration and topologies are listed in our AM437x data sheet. Please refer to the Section 5.13.8.2 which has details on the DDR3 implementation

#3 Just to re-iterate again, the noise you are measuring <200mV should be much lower than the VIH(min) of the DRAM part. Therefore, I suspect if the noise on the address line you measured is the real issue here

#4 Could you help specifically more on the fail signature - does the value written to 0x80000000 appear on 0x80000004 or the change on 0x80000004 is random? I strongly suggest you review your DDR configuration. Please use this tool to arrive at the right settings -  www.ti.com/lit/an/sprac70/sprac70.pdf. Please share the results of the tool and your configuration so we can take a look and comment more

#5 I don't see an issue in using 50 ohm as the parallel termination resistor if your Z0 is 50 ohm

As I mentioned earlier, please make sure you do the following:

- Make sure your layout is implemented as per the requirements in the data sheet

- Verify the EMIF configuration and settings. You can use the EMIF tool that I pointed above for this

After you have both the above, let us review again. Please let me know if you have any other questions

Regards, Siva