Linux/am3352: eMMC clock and omapconf doesn't display OPP values

Ankur Tank

Expert 2985 points

Part Number: AM3352
Other Parts Discussed in Thread: TPS650250

Tool/software: Linux

Hi,

we are using Bealgbone black based custom board,

I was trying to get OPP by omapconf using command as mentioned below

./omapconf show pwst

But OPP column says “NOT FOUND”

However when I run same command on beaglbone black I get the values.

I have attached file which has output of above command from both the boards.

Actually I wanted to verify eMMC clock. I get clock speed as 52Mhz from sysfs, from TRM it is fixed at 48Mhz but it also mentions 48Mhz @ OPP50

I am not sure if that OPP is for eMMC or OPP of am335x.

So now I want to know OPP so that we can understand what is the max eMMC clock we set for AM3352.

# cat /sys/kernel/debug/mmc1/ios

clock: 52000000 Hz

vdd: 20 (3.2 ~ 3.3 V)

bus mode: 2 (push-pull)

chip select: 0 (don't care)

power mode: 2 (on)

bus width: 3 (8 bits)

timing spec: 1 (mmc high-speed)

signal voltage: 0 (3.30 V)

Thank you,

Regards,

Ankur

opp_for_boards.txt


===================================================================================================================================================================
												custom board
===================================================================================================================================================================

# ./omapconf show pwst
OMAPCONF (rev v1.73-19-gbe8626b built Wed Sep 13 10:18:44 EDT 2017)

HW Platform:
  Generic AM33XX (Flattened Device Tree)
  AM3352 ES2.1 GP Device (UNKNOWN performance ZCE package (600MHz))
  UNKNOWN POWER IC
  UNKNOWN AUDIO IC

SW Build Details:
  Build:
release_details_get(): could not open /etc/issue.net file?!
    Version: UNKNOWN
  Kernel:
    Version: 3.12.10-005-ts-armv7l
    Author: ankur@ankur-HP-Z440-Workstation
    Toolchain: gcc version 4.8.3 (Timesys 20170124)
    Type: #1
    Date: Tue Sep 12 16:36:33 EDT 2017

|---------------------------------------------------------------------------------------------------------------------------------------------------------------|
| OMAP Power Status                                                                                                                                            |
|---------------------------------------------------------------------------------------------------------------------------------------------------------------|
| Voltage Domain                | Power Domain                 | Clock Domain          | Module Status                                                          |
| Name              | OPP       | Name       | Curr.  | Target | Name       | Status   | Name                  | Rate (MHz) | Idle                 | Standby    |
|---------------------------------------------------------------------------------------------------------------------------------------------------------------|
| VDD_CORE          | NOT FOUND | WKUP       | OFF    | OFF    | L4WKUP     | Running  | L4_WKUP_INTERCONNECT  | 100.000    | Full ON              |            |
|                   |           |            |        |        |------------------------------------------------------------------------------------------------|
|                   |           |            |        |        | WKUP_L3_AON | Running  | DEBUGSS               | 200.000    | In Transition        | Functional |
|                   |           |-------------------------------------------------------------------------------------------------------------------------------|
|                   |           | GFX        | ON     | ON     | GFX_L3     | Gated    | GFX                   | 100.000    | Disabled (NO ACCESS) |            |
|                   |           |-------------------------------------------------------------------------------------------------------------------------------|
|                   |           | PER        | ON     | ON     | L4_SLOW    | Running  | L4_PER_INTERCONNECT   | 100.000    | Full ON              |            |
|                   |           |            |        |        |------------------------------------------------------------------------------------------------|
|                   |           |            |        |        | L3_SLOW    | Running  | L3_MAIN1_INTERCONNECT | 100.000    | Full ON              |            |
|                   |           |            |        |        |------------------------------------------------------------------------------------------------|
|                   |           |            |        |        | L3_FAST    | Running  | L3_MAIN2_INTERCONNECT | 200.000    | Full ON              |            |
|                   |           |            |        |        |            |          | EMIF4                 | 200.000    | Full ON              |            |
|                   |           |            |        |        |            |          | PHY_EMIF              | 400.000    |                      |            |
|                   |           |            |        |        |------------------------------------------------------------------------------------------------|
|                   |           |            |        |        | L4_FAST    | Running  | L4_FAST_INTERCONNECT  | 200.000    | Full ON              |            |
|---------------------------------------------------------------------------------------------------------------------------------------------------------------|
| VDD_MPU           | NOT FOUND | MPU        | ON     | ON     | MPU        | Running  | MPU                   | 550.000    | Full ON              |            |
|---------------------------------------------------------------------------------------------------------------------------------------------------------------|

===================================================================================================================================================================
												Beaglebone Black
===================================================================================================================================================================


./omapconf show pwst
OMAPCONF (rev v1.73-19-gbe8626b built Wed Sep 13 10:18:44 EDT 2017)

HW Platform:
  Generic AM33XX (Flattened Device Tree)
  AM3359 ES2.0 GP Device (UNKNOWN performance ZCZ package (1.0GHz))
Error: I2C Read failed
Error: I2C Read failed
Error: I2C Read failed
  TPS65217C  ES1.2 
Error: I2C Read failed
  UNKNOWN AUDIO IC

SW Build Details:
  Build:
    Version:  _____                    _____           _         _   
  Kernel:
    Version: 4.4.41-gf9f6f0db2d
    Author: ankur@ankur-HP-Z440-Workstation
    Toolchain: gcc version 5.3.1 20160113 (Linaro GCC 5.3-2016.02)
    Type: #1 PREEMPT
    Date: Tue Jun 6 10:25:28 EDT 2017

|---------------------------------------------------------------------------------------------------------------------------------------------------------------|
| OMAP Power Status                                                                                                                                            |
|---------------------------------------------------------------------------------------------------------------------------------------------------------------|
| Voltage Domain                | Power Domain                 | Clock Domain          | Module Status                                                          |
| Name              | OPP       | Name       | Curr.  | Target | Name       | Status   | Name                  | Rate (MHz) | Idle                 | Standby    |
|---------------------------------------------------------------------------------------------------------------------------------------------------------------|
| VDD_CORE (1.125V) | OPP100    | WKUP       | OFF    | OFF    | L4WKUP     | Running  | L4_WKUP_INTERCONNECT  | 100.000    | Full ON              |            |
|                   |           |            |        |        |------------------------------------------------------------------------------------------------|
|                   |           |            |        |        | WKUP_L3_AON | Running  | DEBUGSS               | 200.000    | In Transition        | Functional |
|                   |           |-------------------------------------------------------------------------------------------------------------------------------|
|                   |           | GFX        | ON     | ON     | GFX_L3     | Running  | GFX                   | 100.000    | Full ON              | Functional |
|                   |           |-------------------------------------------------------------------------------------------------------------------------------|
|                   |           | PER        | ON     | ON     | L4_SLOW    | Running  | L4_PER_INTERCONNECT   | 100.000    | Full ON              |            |
|                   |           |            |        |        |------------------------------------------------------------------------------------------------|
|                   |           |            |        |        | L3_SLOW    | Running  | L3_MAIN1_INTERCONNECT | 100.000    | Full ON              |            |
|                   |           |            |        |        |------------------------------------------------------------------------------------------------|
|                   |           |            |        |        | L3_FAST    | Running  | L3_MAIN2_INTERCONNECT | 200.000    | Full ON              |            |
|                   |           |            |        |        |            |          | EMIF4                 | 200.000    | Full ON              |            |
|                   |           |            |        |        |            |          | PHY_EMIF              | 400.000    |                      |            |
|                   |           |            |        |        |------------------------------------------------------------------------------------------------|
|                   |           |            |        |        | L4_FAST    | Running  | L4_FAST_INTERCONNECT  | 200.000    | Full ON              |            |
|---------------------------------------------------------------------------------------------------------------------------------------------------------------|
| VDD_MPU (0.950V)  | OPP50     | MPU        | ON     | ON     | MPU        | Running  | MPU                   | 300.000    | Full ON              |            |
|---------------------------------------------------------------------------------------------------------------------------------------------------------------|

over 6 years ago

0 Pavel Botev over 6 years ago

TI__Guru**** 170625 points

Hi Ankur,

From the log I see that PMIC is not recognized for your custom board (UNKNOWN POWER IC), while for BBB it is properly detected as TPS65217C. Do you use PMIC for your custom board? If yes, which PMIC exactly? OPP values are dependent of the PMIC also.

Another important difference is that you are using different SW for BBB and your custom board. For BBB you are using kernel 4.4.41, for custom board kernel 3.12.10. Please try with the same kernel version for both boards?

Do you use AM335x TI PSDK for BBB and/or custom board? If yes, which version?

Regards,
Pavel

0 Ankur Tank over 6 years ago in reply to Pavel Botev

Expert 2985 points

Thank you for reply Pavel,

we are using PMIc on out board. it is from TI TPS650250.
I tried kernel 4.4 on custom board as well. But it still it didn't work.

One thing is we haven't connected PMIC_POWER_EN pin on am335x.

Yes we are using TI PSDK for BB and for custom also ( actually it from timesys but they also take it from TI and don't change anything as such).

I don't know what am i missing here.
Moreover just to confirm that MMC clock can't go beyond 48Mhz right? then why kernel show clock as 52 Mhz ? And it is actually 52Mhz in BBB also. I am bit confused here.

Thank you,

Regards,
Ankur

0 Pavel Botev over 6 years ago in reply to Ankur Tank

TI__Guru**** 170625 points

Ankur,

MMC belongs to the VDD_CORE domain. OPP is per volatge domain, so you should related OPP to the VDD_CORE.

There are three clock signals related to MMC, two internal and one external.

The two internal clock signals are functional and interface clock, they come from device PRCM (CORE and PER PLLs). These clock signals frequencies can be checked through omapconf tool, clock framework or dumping the PLLs registers. Functional clock (MMC_CLK) is 48MHz for OPP50 and 96MHz for OPP100. It is derived from PER PLL, see AM335x TRM, section 8.1.6.8 Peripheral PLL Description. Interface clock is 50MHz at OPP50 and 100MHz at OPP100, derived fom Core PLL, see AM335x TRM, section MMCHS Clock and Reset Management.

The external clock is the one on the MMC_CLK pin, and this one can not be evaluated through omapconf and clock framework. It is based on the functional clock and internal MMC module divider.

Which one of these 3 clock signals you need to know the frequency?

Regards,
Pavel

0 Ankur Tank over 6 years ago in reply to Pavel Botev

Expert 2985 points

Hi Pavel,

Sorry for late reply, I got busy with other high priority fixes and couldn't look into this.

I didn't understand when you say "I have to OPP to VDD_CORE ?" For my board VDD_CORE is 1.1V How should i related to OPP ?

omapconf doesn't display anything for VDD_CORE.

|----------------------------------------------------------------------------|
|                      | Temperature | Voltage | Frequency | OPerating Point |
|----------------------------------------------------------------------------|
| VDD_CORE / VDD_CORE0 | NA          | NA      |           | UNKNOWN         |
|   L3_SLOW            |             |         |  100  MHz |                 |
|   L3_FAST            |             |         |  200  MHz |                 |
|   EMIF4              |             |         |  200  MHz |                 |
|     DDR2/DDR3/mDDR   |             |         |  400  MHz |                 |
|   L4_PER             |             |         |  100  MHz |                 |
|   L4_FAST            |             |         |  200  MHz |                 |
|                      |             |         |           |                 |
| VDD_MPU / VDD_CORE1  | NA          | NA      |           | UNKNOWN         |
|   MPU (CPU0 OFF)     |             |         |  600  MHz |                 |
|                      |             |         |           |                 |
|----------------------------------------------------------------------------|

I was looking for functional clock

I referred same below line as you pointed out in TRM, however now I don't know OPP.

Functional clock (MMC_CLK) is 48MHz for OPP50 and 96MHz for OPP100. It is derived from PER PLL, see AM335x TRM, section 8.1.6.8 Peripheral PLL Description.

I referred another e2e post, and as per post for AM335x clock frequencies beyond 48MHz is not supported. I got really confused if clock frequencies beyond 48Mhz is not supported then why TRM says that MMC_CLK is 96MHz at OPP100. I am missing something here.

https://e2e.ti.com/support/arm/sitara_arm/f/791/t/549883?tisearch=e2e-quicksearch&keymatch=eMMC%20HS400

0 Pavel Botev over 6 years ago in reply to Ankur Tank

TI__Guru**** 170625 points

Ankur Tank said:
I didn't understand when you say "I have to OPP to VDD_CORE ?" For my board VDD_CORE is 1.1V How should i related to OPP ?

You have OPP100 for VDD_CORE (MMC). Thus you have 96MHz max for MMC func clock, 100MHz max for MMC interface clock.

Ankur Tank said:
I was looking for functional clock

Ankur Tank said:
I referred same below line as you pointed out in TRM, however now I don't know OPP.

It is OPP100 (VDD_CORE is 1.1V nominal value), this is explained in AM335x datasheet

Ankur Tank said:

I referred another e2e post, and as per post for AM335x clock frequencies beyond 48MHz is not supported. I got really confused if clock frequencies beyond 48Mhz is not supported then why TRM says that MMC_CLK is 96MHz at OPP100. I am missing something here.

https://e2e.ti.com/support/arm/sitara_arm/f/791/t/549883?tisearch=e2e-quicksearch&keymatch=eMMC%20HS400

This post is referring to the clock frequency on the MMC_CLK pin. This is not functional/interface clock, this is external clock that is going between AM335x device and external eMMC chip. See AM335x datasheet, Table 7-88. Switching Characteristics for MMC[x]_CLK

ƒop(CLK) - Operating frequency, MMC_CLK, high-speed mode, max 48MHz

Let me know if you have more question.

Regards,
Pavel

0 Ankur Tank over 6 years ago in reply to Pavel Botev

Expert 2985 points

Thank you for reply Pavel,

So Does that mean

whatever kernel is displaying below is interface clock ? and We can't see function clock from kernel right ?

Only way is to to dump registers and calculate right ?

# cat /sys/kernel/debug/mmc1/ios

clock:             52000000 Hz
vdd:               20 (3.2 ~ 3.3 V)
bus mode:          2 (push-pull)
chip select:       0 (don't care)
power mode:        2 (on)
bus width:         3 (8 bits)
timing spec:       1 (mmc high-speed)
signal voltage:    0 (3.30 V)

Thank you,

Regards,

Ankur

0 Pavel Botev over 6 years ago in reply to Ankur Tank

TI__Guru**** 170625 points

Ankur,

You can get the MMC functional clock frequency in linux kernel like below:

root@am335x-evm:/sys/kernel/debug/clk/mmc_clk# cat clk_rate
96000000

As you can see, I have 96MHz on AM335x TI EVM. For more information regarding MMC functional clock you can check:

{PSDK}/board-support/linux-kernel/arch/arm/boot/dts/am33xx-clocks.dtsi
mmc_clk: mmc_clk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&dpll_per_m2_ck>;
clock-mult = <1>;
clock-div = <2>;
};

AM335x TRM:

section 8.1.6.8 Peripheral PLL Description
chapter 18 Multimedia Card (MMC)

Regards,
Pavel

0 Pavel Botev over 6 years ago in reply to Ankur Tank

TI__Guru**** 170625 points

Ankur Tank said:
# cat /sys/kernel/debug/mmc1/ios clock: 52000000 Hz vdd: 20 (3.2 ~ 3.3 V) bus mode: 2 (push-pull) chip select: 0 (don't care) power mode: 2 (on) bus width: 3 (8 bits) timing spec: 1 (mmc high-speed) signal voltage: 0 (3.30 V)

/sys/kernel/debug/mmc<x>/ios shows info about the inserted MMC/SD card or eMMC chip. On AM335x TI EVM I have:

root@am335x-evm:/sys/kernel/debug/mmc1# cat ios
clock:       50000000 Hz
vdd:       21 (3.3 ~ 3.4 V)
bus mode:   2 (push-pull)
chip select:   0 (don't care)
power mode:   2 (on)
bus width:   2 (4 bits)
timing spec:   2 (sd high-speed)
signal voltage:   0 (3.30 V)
driver type:   0 (driver type B)

The clock value (52MHz in your case) seems to be valid for the MMC clock pin, not functional clock. But as it is out of scope (48MHz max value in datasheet), I would suggest you to double check this value with a scope.

Regards,
Pavel

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Linux/am3352: eMMC clock and omapconf doesn't display OPP values