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AM5718: TPS659162 hardware connections

Part Number: AM5718
Other Parts Discussed in Thread: AM5708, , TPS65916

Hi everybody , 

I must be able to reboot linux in my hw , wihout powering off ( some data are in RAM and must  be available after reboot ) .

which is proper HW connection ?  I am follwoing  the 

"DRA71x LCARD CPU Board - REV B2" (which is  AM5708 + TPS651963) where signal  RSTOUTN out of  AM5708 is connected to  GPIO_1 of  TPS651963;  one note states   "GPIO_1 = nRESWARM"   : so it is happening to me system is   powering off .

how can I solve this ?  coudl you give me a porper connection ? 

thank you 

regards

Carlo

  • Carlo,

    Can you please clarify which processor you are using - AM5708 or AM5718? And also which PMIC - TPS659162 or TPS659163?

  • Hi Biser
    sorry for confusion , I am on AM5718
    thank you
    regards
    Carlo
  • I have asked the factory team to comment. Meanwhile, do you have this document: www.ti.com/.../slvuao4c.pdf
  • Hi Carlo,

    There are two silicon errata advisories that prevent DDR from being accessed after a warm reset (RESETn). Those advisories are i727 and i729. The work around to those advisories require you to either perform a cold reset (PORz) or to reset the DDR chips during a warm reset. Both cases will erase the DDR contents!

    Due to these limitations the TPS65916 is capable of executing a cold reset (PORz) only. Therefore you will need to save data to non-volatile memory.

    Do you have any additional schematic questions?

    Regards,
    Ahmad

  • Hi everybody,

    we solved all issues regarding data retention using storage on a non-volatile memory.

    In any case, according to silicon errata i727 and i729, we are planning to use "Implementation 1" reported for i862: "PMIC asserts PORZ when RSTOUTN is connected to PMIC NRESWARM input":

    To allow software to shut down the PMIC we connected PMIC NRESWARM input to PMIC pin 2 configured as GPIO_2; in particular:

    - for reboot implementation: GPIO_2 is held at logic '1' and the AM5718 asserts RSTOUTN; the PMIC remains in the ACTIVE state because POWERHOLD is at logic '1'

    - for power off implementation: GPIO_2 is set to logic '0', the PMIC trasitions from the ACTIVE state to the OFF state (of course DEV_ON bit must be '0')

    Do you think this is a correct implementation?

    Many thanks in advance,

    Marco

  • Hi Marco,

    Good to hear you're able to work around retaining data with a cold reset. For your questions, please keep GPIO_5 / POWERHOLD pulled up to VRTC. But for GPIO_2 it isn't being used, so this should be kept floating as per the TPS65916 datasheet. Or it can be used as an I2C controlled GPIO for your own application.

    Regards,
    Ahmad

  • Dear Ahmad,

    thank you for your reply.

    For sure we will keep GPIO_5/POWERHOLD pulled up to VRTC, furthermore our OS will control GPIO_2 to bring GPIO_5/POWERHOLD to logic '0' to power off the PMIC.

    Do you think that the connection of GPIO_2 to GPIO_5/POWERHOLD is a reliable solution to implement reboot without a power cycle and power off functionalities?

    Regards,

    Marco

  • Dear Ahmad,

    sorry to insist, can you give a reply to my question? We need this answer to properly modify some prototype boards that we are using for validation.

    Many thanks in advance for your support.

    Regards,

    Marco

  • Can you explain why you are trying to change the design from the reference? The RESET connections in DRA71x LCARD CPU Board - REV B2 are correct as-is.

    "one note states   "GPIO_1 = nRESWARM"   : so it is happening to me system is   powering off"

    The PMIC should not be powering off from the nRESWARM pin. Please disconnect everything from the POWERHOLD pin except the VRTC pull up resistor. Please test this and report your results. 

  • Hi Ahmad,

    initially we decided to use "Implementation 2" for i862:

    - an external circuit is used to generate PORZ for the AM5718

    - in this implementation POWERHOLD is pulled down to GND, so the software is allowed to shut down the PMIC

    - but, as stated in SLVUAO4C pg. 14: "If POWERHOLD is set to GND and AUTODEVON is disabled, the PMIC will shut off during the warm reset sequence", and this is NOT OK for our implementation

    So we eventually decided to use "Implementation 1" for i862:

    - we can avoid the external circuit used to generate PORZ, so we can also optimize the cost

    - AM5718 RSTOUTN is connected to PMIC NRESWARM input and PMIC directly asserts AM5718 PORZ, exactly as in the "DRA71x LCARD CPU Board - REV B2"

    - POWERHOLD is pulled up to VRTC, so in this case the software is not directly allowed to shut down the PMIC, this is the only drawback of "Implementation 1" for us

    To overcome this drawback the same "DRA71x LCARD CPU Board - REV B2" uses this solution:

    As far as I can understand, when the MCU sets MCU_PMIC_POWERHOLD pin to '1' the signal PMIC_EN (GPIO_5/POWERHOLD) goes to '0' and the PMIC starts the transition to the OFF state.

    In our implementation we would like to avoid the use of this external circuit by simply using GPIO_2 of the PMIC itself to bring GPIO_5/POWERHOLD to '0' when we want the OS to switch-off the PMIC.

    We already tried this implementation and it is working correctly, we only need to know if you think that it can be really adopted for production or if it can have any drawback.

    Please let us know.

    Regards,

    Marco

  • Mi Marco,

    Apologies, it sounded like the circuit was not working. I understand now that you need a way to shut down since POWERHOLD is held high. If you want to stick with GPIO_2 you should make sure to configure it for open drain mode. Otherwise GPIO_2 can drive a 3.3V signal (VIO level) causing a voltage conflict with the GPIO_5 pin which is only 1.8V capable (VRTC level).

    Please post on the PMIC forum to confirm. Make sure the PMIC experts have a chance to give their thoughts.

    Regards,
    Ahmad
  • Hi Ahmad,

    thank you for your reply. Regarding GPIO_2 I forgot to indicate that we are using +1.8V for VIO.

    According to your suggestion I will soon post on the PMIC forum.

    Again, many thanks for your support.

    Regards,

    Marco