This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM3352: Boot sequence

Guru 15510 points
Part Number: AM3352

Hi,

I have a question about AM335x Boot Sequence.

My customer want to use boot mode which boot sequence is as follow:
////////////////////////////////////////////////////////////////
SYSBOOT[4:0] = 00100b : UART0 -> XIPw/WAIT(MUX1) -> MMC0 -> NAND
////////////////////////////////////////////////////////////////

The reason of why using this sequence is,
mostly they will use NAND boot but in some case they will use
MMC0 boot without erasing the boot image from NAND Flash.
So, MMC0 boot phase should be before the NAND boot phase in the sequence and
the above sequence is the only supported sequence.

In above boot sequence, XIP(MUX1) boot phase will be executed before NAND boot.
Because XIP and NAND uses same GPMC pins, does it affect to NAND flash memory during XIP boot phase?
Or is it just fail the XIP boot phase, and go to the next MMC0 boot or NAND boot phase?

best regards,
g.f.