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[FAQ] Smart Amp

Other Parts Discussed in Thread: TAS5766M, TAS5768M

What you need to develop TAS576xM-based Smart Amp systems

Applies to:

TAS5766M
TAS5768M


To start Smart Amp development, you will need to:

1. Request Hardware and Software

a. The Learning Board (needed to characterize speakers):

PP-SALB-EVM

b. A Smart Amp Device EVM:

Go to the desired EVM website and click More Info.

TAS5766M DCA: TAS5766MDCAEVM (requires PUREPATH-CMBEVM which is not included, order separately)
TAS5766M RMT: TAS5766MRMTEVM (requires PUREPATH-CMBEVM which is not included, order separately)

NOTE:
Clicking More Info provides access to links on how to order the hardware and/or download the software. No purchase is necessary.

c. A weight scale, metric ruler and adhesive putty. See the PurePath Smart Amp Overview for details.

2. Download Software and Documentation

a. Once approved, you will receive an email with links to order hardware and download software, documents, and videos.

b. Your software, documents, and videos will be available on your https://www.ti.com/securesoftware account.

How to implement Smart Amp code into an end-system

Smart Amp devices have a processing engine that requires instructions and coefficients to be downloaded to it. These instructions and coefficients are generated by the PurePath Console 3 software and are based on custom tunings performed by the customer. There are several formats that PurePath Console can output, the most common one being a header (.h) file.

The PurePath Smart Amp User Manual explains how to generate and incorporate Smart Amp tunings into an end-system.

PurePath™ Smart Amp for Laptops

Applies to:

TAS5766M
TAS5768M


We've released a new app note to help those who are implementing Smart Amp in laptop systems.

Laptop computers have special time requirements and memory restrictions that are not usually present on other device form factors. This report discusses methods to configure the Smart Amp device in a basic mode during the computer Power-on Self-test (POST) to overcome these limitations. Download times and memory requirements are also presented for each configuration.

It also provides suggestions on driver development to ease the tuning process.

App note link: http://www.ti.com/lit/pdf/slaa653 

Example dump definition files and scripts: http://www.ti.com/lit/zip/slaa653

Figure 1: Code Download Flow

 

TAS5766M - Configuring SDOUT functionality

As explained in the TAS5766M and TAS5768M datasheets, SDOUT (GPIO3) can be configured to output pre-processed or post-processed data, which may be useful for echo-cancellation algorithms in the host.

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w 98 00 00 # Select Page 0
w 98 07 00 # SDOUT is the DSP output. 0x00: post-processing, 0x01: pre-processing.
w 98 55 07 # GPIO3 output = SDOUT
w 98 08 20 # GPIO3 is an output

TAS5766M - Effect of XSMT, I2S, RQST and RQPD on power consumption

Applies to:

TAS5766M
TAS5768M


The TAS5766M and TAS5768M can automatically detect a clock error (or absence) for its audio serial interface and place the device into power down mode (same mode as RQPD). In such mode, the power consumption is at a minimum.

The XSMT pin (when not operated in UVP) does not significantly affect power consumption. The PWM modulator will still be active even if XSMT is low.

The table below summarizes the effect of XSMT, I2S, RQST and RQPD on power consumption.

Figure 1.      TAS5766M Power Consumption Example

 

TAS5766M - Effects of power cycling on memory

Applies to:

TAS5766M
TAS5768M


The TAS5766M and TAS5768M have an integrated miniDSP with volatile memory for instructions (I-RAM) and coefficients (C-RAM). A high level overview of this architecture is shown below.

Figure 1.      TAS5766M miniDSP Memory Access

Looking at Figure 1 and the table below it can be concluded that I-RAM and C-RAM are fully accessible through I2C during Standby Mode and C-RAM is partially available in Adaptive Mode.

Figure 2.      Memory Access Control Bits

In summary:

1. When the TAS5766M is in Standby Mode (RQST = 1), I-RAM is available through P152-P169, C-RAM Buffer A is available through P44-P52 and C-RAM Buffer B is available through P62-70 via the I2C interface.

2. When the TAS5766M is in Active Mode (RQST = 0) and in Non-adaptive Mode (AMDC = 0), I-RAM and C-RAM cannot be accessed via the I2C interface.

3. When the TAS5766M is in Active Mode (RQST = 0) and in Adaptive Mode (AMDC = 1), only one of the C-RAM buffers can be accessed via the I2C interface based on the ACRM bit status.

The table below summarizes the effects on the Register MapC-RAM and I-RAM when removing and applying a power supply (power cycling).

Figure 3.      Effect of Power Cycling on Register Map, C-RAM and I-RAM

Note that RSTR and RSTM (reset registers and reset modules) require standby or power down to be enabled (RQST or PQPD to be '1').

An important detail is that the I-RAM contents are retained even if the device is reset. Only a power cycle of the DVDD supply clears the I-RAM contents.

TAS5766M - How to boot into a basic, non-Smart Amp mode

Applies to:

TAS5766M
TAS5768M


After reset, the TAS5766M is configured in DSP Mode 1, which can be used for basic audio playback. To play audio, simply provide a proper SCK, BCK, LRCK and DIN data. The TAS5766M will automatically configure its internal clocking if a supported SCK, BCK and LRCK combination is used. Refer to the TAS5766M datasheet for details.

If the TAS5766M is already programmed, it can be reset into DSP Mode 1 as follows:

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#-------------------------------------------------
# Reset
#-------------------------------------------------
# Select Page 0
w 98 00 00
# Set the device into Powerdown
w 98 02 11
# Reset Device
w 98 01 11

For systems where SCK is not present, it is possible to internally generate master clock from BCK by running the script below:

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# Select Page 0
w 98 00 00
# PLL reference clock = BCK (no SCK present)
w 98 0D 10
# Ignore SCK halt detection (no SCK present)
w 98 25 08

 

TAS5766M - Power Up Sequence

Applies to:

TAS5766M
TAS5768M


The power supplies can be brought up in any order. However, external digital signals should not be driven high until DVDD is present. For example, if the device is an I2S slave, I2S should not be present until DVDD is stable. Same for I2C and any other digital pin.

By default, the TAS5766M powers up capable of playing audio. This means that as soon as I2S is provided, DIN data will be output. To prevent undesired audio playback during power-up, the XSMT pin can be pulled low (e.g. 47k-ohm pull-down) and controlled by an MCU. The other option is to ensure I2S is not provided until RQST or RQPD are configured.

Refer to the Recommended Power Down Sequence section of the datasheet for details on power-down.

 

TAS5766M - Proper way to perform a software reset

Applies to:

TAS5754M
TAS5756M
TAS5766M
TAS5768M


There are two reset bits in Page 0 / Register 1: RSTM and RSTR.

  • RSTM (Reset Modules) resets the Coefficient RAM (CRAM) to its default values.
  • RSTR (Reset Registers) resets Page 0 and Page 1 registers to default.

The device needs to be in Standby Mode or Power Down Mode (Page 0 / Register 2) before writing RSTM or RSTR.

However, in Power Down Mode, both RSTM and RSTR must be set to '1' at the same time if a reset is desired.

Example:

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w 98 00 00 # Page 0
w 98 02 01 # Power Down
w 98 01 11 # Reset Modules + Registers

The following combinations are not supported in Power Down mode:

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w 98 00 00 # Page 0
w 98 02 11 # Standby + Power Down
w 98 01 10 # Reset Modules (not supported!)
w 98 00 00 # Page 0
w 98 02 01 # Power Down
w 98 01 10 # Reset Modules (not supported!)

If only Standby Mode is selected, then any RSTM/RSTR combination is ok.

TAS5766M - Which C-RAM locations can be ignored when performing a diff?

Applies to:

TAS5766M
TAS5768M


It is sometimes desired to compare (diff) two register dumps of the Smart Amp code. For example: to determine the values of a volume control or to verify that the code downloaded properly to the system.

For the current Smart Amp algorithm in PurePath Console 3 and the older one in PurePath Console 1, the following register locations can be ignored when comparing a dump:

 

Adaptive Buffer A:

Coeff | Page / Register Range
----------------------------
        0x2c / 0x01-0x07
C6      0x2c / 0x20-0x23
C7      0x2c / 0x24-0x27
C30     0x2d / 0x08-0x0b
C31     0x2d / 0x0c-0x0f
C32     0x2d / 0x10-0x13
C37     0x2d / 0x24-0x27
C38     0x2d / 0x28-0x2b
C39     0x2d / 0x2c-0x2f
C53     0x2d / 0x64-0x67
C54     0x2d / 0x68-0x6b
C59     0x2d / 0x7c-0x7f
C93     0x2f / 0x14-0x17
C245    0x34 / 0x1c-0x1f
        0x34 / 0x48-0x7f

 

Adaptive Buffer B:

Coeff | Page / Register Range
----------------------------
        0x3e / 0x01-0x07
C6      0x3e / 0x20-0x23
C7      0x3e / 0x24-0x27
C30     0x3f / 0x08-0x0b
C31     0x3f / 0x0c-0x0f
C32     0x3f / 0x10-0x13
C37     0x3f / 0x24-0x27
C38     0x3f / 0x28-0x2b
C39     0x3f / 0x2c-0x2f
C53     0x3f / 0x64-0x67
C54     0x3f / 0x68-0x6b
C59     0x3f / 0x7c-0x7f
C93     0x41 / 0x14-0x17
C245    0x46 / 0x1c-0x1f
        0x46 / 0x48-0x7f

TAS5766M - Why does my music sound out of phase with the TAS5766MDCAEVM?

Applies to:

TAS5766MDCAEVM


If you use identical JST cables with this EVM you will find that the right channel banana plug colors are inverted. This is because the (+) and (-) terminals of the Class-D outputs are routed out directly from the device without crossing over in the PCB. You can see from the image below that the right channel (+) is black and (-) is green ... completely the opposite to the left channel.

If unsure, always compare the (+) and (-) terminals against the cable/plug colors.