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# [FAQ] TLV320AIC CODECs: How do I calculate the input impedance of an TLV320AIC device?

How do I calculate the input impedance of an TLV320AIC device?

Regards,
Collin Wells

• Applies to:  TLV320AIC3203, TLV320AIC3253, TLV320AIC3204, TLV320AIC3254, TLV320AIC3206, TLV320AIC3256, TLV320AIC36, TLV320AIC3100, TLV320AIC3101, TLV320AIC3104, TLV320AIC3105, TLV320AIC3106, TLV320AIC3107, TLV320AIC3109, TLV320AIC3110, TLV320AIC3111, TLV320AIC3120, TLV320AIC3212, TLV320AIC3262, TLV320AIC3263 and TLV320AIC3268.

The analog inputs to these devices should be ac-coupled to the device terminals to allow decoupling of signal source's common mode voltage with that of input common mode voltage. The input coupling capacitor in combination with the selected input impedance forms a high-pass filter:

Fc = 1/(2*π*Req*Cc)
Cc = 1/(2*π*Req*Fc)

For high fidelity audio recording application it is desirable to keep the cutoff frequency of the high pass filter as low as possible. For single-ended input mode, the equivalent input resistance Req can be calculated as:

Req = Rin* (1 + 2g)/(1+g)

The variable g is the analog PGA gain calculated in linear terms:

g = 10000 * 2floor(G/6)/Rin

where G is the programmed analog PGA gain programmed (in dB) and Rin is the value of the programmed input resistor
and assumes Rin = Rcm.

For differential input mode, Req of the half circuit can be calculated as:

Req = Rin

where Rin is the value of the programmed input resistor, assuming symmetrical inputs.

When the analog signal is connected to the system through a connector such as audio jack, it is recommended to put a pull-down resistor on the signal as shown below. The pull-down resistor helps keep the signal grounded and helps improve noise immunity when no source is connected to the connector. The pull-down resistor value should be chosen large enough to avoid loading of signal source.

Each analog input is capable of handling signal amplitude of 0.5Vrms. If the input signal source can drive signals higher than the maximum value, an external resistor divider network as shown below should be used to attenuate the signal to less than 0.5Vrms before connecting the signal to the device. The resistor values of the network should be chosen to provide desired attenuation as well as to satisfy the following equation:

R1||R2<<Req