Hi,
I am using TPA3118D2 in a PBTL (mono mode) as per datasheet page 26, figure 37 (bottom part only). I will try to attach the PCB layout as further information if this editor lets me.
My problem is it is generating too much EMI/ radiated noise ground of the PCB seems to be the worse case, PVCC seems to be ok but ground has a lot of noise on it which is causing EMC problems. looking at the ground noise with a spectrum analyser, I can see anything between 15-20dBuv noise at 150MHz. This noise is all over the PCB and causing problems. I dont mind so much the noise level, its the location of noise on the frequency band (150MHz), if it had the same noise level at higher or lower frequency I wouldnt mind but just cant have it where it is currently.
Noise existing on ground makes it difficult to make notch filters or traps. The PCB is my first prototype and I realise the output out of the chip and its output out of the inductor have a largish copper area, I will make these smaller on the next iteration - any tips on the layout would be great - on my list is lots of stitching to reduce impedance. I am also looking at TI's evaluation PCB to try to do a similar layout.
I am also trying to use ferrites to combat the radiation with their attenuation at around 150MHz, any other thing I should be looking at?
For now any help on reducing this ground noise and radiation would be great.
Thanks,
Sean
Below, current and new layouts.