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TAS6424-Q1: OTSD Warning Levels Register

Part Number: TAS6424-Q1

Hi Team,

In the TAS6424-Q1 datasheet, section 9.3.8.5 refers to warning levels that can be selected. Which register in the register map allow you to select the level?

Thank you,

Jared

  • Hi Jared,

    Please take a look at I2C register 0x01 bits 5 and 6.  These set the warn temperature level.

  • Hi Gregg,

    Thanks for the note! I want to clarify a couple more points in this section.

    In the last sentence, it says "When the junction temperature returns to normal levels..." Is there a specific quantification to "normal levels"?  For example, does the die need to fall below the OTW temp threshold to be considered normal?

    Additionally, the rest of the sentence says, ".. the device automatically recovers and places all channels into the state indicated by the register settings". Can you please specify which "register settings" are referred to here? I am thinking this is whatever is loaded into the state control register 0x04, but would like to clarify.

    Thank you,

    Jared 

  • Jared,

    There is a 15C hysteresis.  This means the temperature must drop 15C below the OTW temperature to clear it.