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Part Number: TLV320AIC23B
I use AIC23B to play and record audio, aic23b works as Slave, MCU as Master, I2S mode. MCU provide LRCIN and BCLK. play sound is good, but recording sound is very not clear with periodicity noise.
the AIC23B init code is DSP2833x_Audio_App download from TI. I enable side tone when recording, the sound is clear. it's ADC issue i think, how can i do it?
is the MCLK coming from the MCU? and is it in synced with the audio clocks?
what is your Fs? bclk frequency? Mclk frequency?
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In reply to Steve-Wilson:
Yes, the MCLK is coming from the MCU,It's provided by the I2S interface and synced with the audio clocks.
the MCLK frequency is 256Fs and the Fs is 8000. so the MCLK is 2048000hz. bclk is 256000hz.
the AIC23b in normal mode with 256Fs, Fs is configed as 48K, due to MCLK is 2048000 the Fs is 8000 indeed match the I2S interface.
the playing and recording use the same I2S config, attached file is recorded 8K 16bit raw PCM data.
the clock measured by oscilloscope are:
MCLK <--> 2.05721Mhz
LRCLK <--> 8.03597Khz
BCLK <--> 257.151Khz
In reply to user6188773:
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