Part Number: TLV320AIC3106
I am currently using a TLVAIC3106 and I measure a digital offset added by the ADC even though input common mode voltage is at 1.35V.
Using the register 12 (set to 0x40 to enable high pass filter) this digital offset is removed.
My question is : as an offset reduces the input analog dynamic range, will the high pass filter allow to regain this loss ?
Given all gain are at 0dB :
0.35V = 0x800000
1.35V => 0x000000
2.35V => 0x7FFFFF
Given an offset of 0x003000:
0.35V = 0x803000
1.35V = 0x003000
2.3X (< 2.35V) = 0x7FFFFF
If the high pass filter is applied to case 2, will it allow to achieve desired functioning (as in case 1) ?
The high pass filter will remove the DC offset from the digital audio.
Regarding your dynamic range, there is also a typical gain error of 0.8dB, which would mean that a .6448Vrms signal would be amplified by the PGA and ADC driver to create a 0.707Vrms input to the ADC.
We are glad that we were able to resolve this issue, and will now proceed to close this thread.
If you have further questions related to this thread, you may click "Ask a related question" below. The newly created question will be automatically linked to this question.
In reply to Steve-Wilson:
Because the high-pass filter is after the ADC in the digital path, the ADC input stage will still saturate asymmetrically due to the offset error as you suspected in Case 2.
This is in addition to the gain errors Steve mentioned.
Regards,Collin WellsPrecision ADC Applications
In reply to Collin Wells:
Thank you for your answers.
What is surprising to me is that we did some measures, and we noticed that the HP filter allows to regain the dynamic.
Here is our experiment (we have an analog path which add some gain) :
When no signal is applied, we have measured a digital offset which is equivalent to a 200mVRMS input signal.
Without the filter, the ADC saturates with a 1.6VRMS sinus at 1KHz.
After the activation of the digital HP filter, we noticed that there were no more saturation at 1.6VRMS neither at 1.7VRMS but at 1.8VRM (here are our 200mVRMS).
I agree that it is unexpected as the filter is placed after de ADC.
I then have two questions which result to this offset issue :
1. Is there a guaranteed range value for the offset for the AIC3106 ?
2. If not, is there a reference of device for which TI can guarantee the ADC offset within a certain range ?
In reply to Corentin NICOLAS:
It isn't common for TI to provide DC specs for audio ADCs, that being said the offset is admittedly higher on this device than on our later codec offerings. for example the AIC3204 would not have as large an offset, or gain error.
It would be uncommon to spec a MAX for this kind of spec as well. a typical value would be more expected.
For the PCM3060 we do spec bipolar zero error with a max of 2% of FSR for Single ended, but that is the only device I have seen with any kind of spec.
All content and materials on this site are provided "as is". TI and its respective suppliers and providers of content make no representations about the suitability of these materials for any purpose and disclaim all warranties and conditions with regard to these materials, including but not limited to all implied warranties and conditions of merchantability, fitness for a particular purpose, title and non-infringement of any third party intellectual property right. No license, either express or implied, by estoppel or otherwise, is granted by TI. Use of the information on this site may require a license from a third party, or a license from TI.
TI is a global semiconductor design and manufacturing company. Innovate with 100,000+ analog ICs andembedded processors, along with software, tools and the industry’s largest sales/support staff.