Part Number: TLV320ADC3101
I am building a recording device with 6 different analog inputs (only 2 active at a time) and I was planning to use TLV320ADC3101 for this. When I try to use some of the channels as single ended inputs, there is an offset value in the recorded signal. See the picture below. I have set the registers
52 = 0xdf (left adc, IN3L single ended input)
55 = 0xf4 (right adc, IN2R single ended input)
and in the 2nd recording
52 = 0xdf (left adc, IN3L single ended input) (same)
57 = 0xfc (right adc, IN1L single ended input) <- This is the only recorded signal that works as expected
What is the reason for the offset in the signal? All 6 inputs are connected using 1uF AC coupling capacitors.
Can you repost the picture? I am unable to see it.
depending on the severity of the offset, it may simply be an issue of gain error. you can remove the offset by using a digital HPF (the ADC3101 can do this)
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In reply to Steve-Wilson:
Hi!Unfortunately, I lost the images. The DC component was at 16000s LSB (with at 16 bit resolution) which means that I essentially only can use half the +-32768 range. I think I would classify this as severe and not just a minor gain error.
All inputs are wired to run as single ended inputs, however the datasheet is not clear if this is a workable setup or if 2 of the inputs should be run as differential inputs and the only the last two one can be run as single ended inputs.
Is there any other setup that has to be done with the chip other than configure register 52 to use the IN2L(P) input for example? Do I need to do anything to make sure that the negative terminal of the PGA is properly biased? When I look at figure 30, the PGA is expecting a differential signal and I am not sure if this has to be configured any more than what register 52 does.
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