TLV320AIC3106: Is there any problem with lrclk of 3106-i2s？

sir sanmaoljh

Part Number: TLV320AIC3106

hi！

Playing audio through HDMI (16bit, 48Khz), line out can't hear external I2S sound on 3106 chip, the oscilloscope measures MCLK = 12.288mhz, lrclk = 48Khz, blck = 3.072hz, I2S management of CPU is all configured as GPIO input function,

But if the second pin of the CPU is configured as lcrclk function, the oscilloscope measures a waveform of about 300K, and line out can hear the sound. Now the second pin of the CPU is converted into GPIO input function, and 3106 can hear the sound normally. Is lrclk not standard?

thanks！

over 4 years ago

0 sir sanmaoljh over 4 years ago

Prodigy 130 points

this is 3106 register‘s value

0 sir sanmaoljh over 4 years ago

Prodigy 130 points

this is 3106 register‘s value

0 Aaron Estrada over 4 years ago in reply to sir sanmaoljh

TI__Mastermind 22950 points

Hello,

Thanks for the post and the register configuration. I am still a little confused as to what is happening... are you saying that when the CPU pin is configured as LRCLK, you see a LRCLK of 300kHz and do NOT hear sound? But when the CPU pin is configured as a GPIO, you hear sound? Is my understanding correct or am I missing something?

Regards,

Aaron

0 sir sanmaoljh over 4 years ago in reply to Aaron Estrada

Prodigy 130 points

Thank you for your reply,

I can hear mic in or line in, but I can't hear I2S. Where is the configuration problem?

3106 configuration slave mode, the following is register configuration.

thanks

0 sir sanmaoljh over 4 years ago in reply to sir sanmaoljh

Prodigy 130 points

If lrclk and BCLK touch each other for a short time, there will be I2S sound sometimes, which is very unstable. Does 3106 not recognize the clock signal? Or do you have a special configuration for 3106 clock? Thank you! Here, adv7612 is the mastermode to generate three clock signals and a data line, and 3106 is the slave mode

0 Collin Wells over 4 years ago in reply to sir sanmaoljh

TI__Guru 62055 points

Hello,

LRCLK and BCLK can not be shorted together while expecting normal operation.

0 sir sanmaoljh over 4 years ago in reply to Collin Wells

Prodigy 130 points

Now, if register reg2 = 0x00 , the audio of HDMI is normal. Why?

0 Collin Wells over 4 years ago in reply to sir sanmaoljh

TI__Guru 62055 points

Register 2 selects the CODEC sampling rate. Selecting 0x00 selects ADC fs = fs(ref)/1. This setting must match what your processor is sending out.

0 sir sanmaoljh over 4 years ago in reply to Collin Wells

Prodigy 130 points

hi:

When the HDMI audio signal source is connected, the lrclk of I2S has 48Khz signal, and the background sound(didi didi noise sound) can be heard in the lineout (left-lop / m right-lop / M), about 3 times per second. If the line in audio signal line of the computer is unplugged, there will be no didi sound.

If mobile phone to 3106's line in, there will be no sound. Is it related to the common ground?

thanks!

0 sir sanmaoljh over 4 years ago in reply to sir sanmaoljh

Prodigy 130 points

power noise, signal isolation module to solve

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TLV320AIC3106: Is there any problem with lrclk of 3106-i2s？