This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TPA3251: Unused channel and input level offset

Part Number: TPA3251
Other Parts Discussed in Thread: TPA3255

Hi!

Q1) How should I treat an unused channel? Should the inputs be connected via a small capacitor (e.g. 0.1 uF) to ground? And the outputs connected to BST via a 33 nF capacitor (but NO other connection)?

Q2) When measuring the DC voltage on INPUT_x (pins 5, 6, 16 and 17) of TI eval board I am measuring ~ 6VDC but on my prototype board, I am measuring 3.9 VDC. Is this normal? VDD on my proto is at 12VDC.(and internally generated AVDD and DVDD are fine). Note that the output is centered at PVDD/2 (i.e. 17.5 VDC) as expected but wondering whether this may have an impact on distortion when I will apply an high amplitude signal.

Thank you in advance for your help!

Louis

  • Hi Louis,

    Q1) I would recommend using a 10uF input capacitor cap to ground. And yes the system requires outputs connected to BST via a 33nF capacitor. You won't need any other connections on the unused channels. 

    Q2) This is strange. The input bias point in our devices should be about 3.9 V if I'm remembering correctly. That way you are able to get the full voltage signal through without any clipping! Did you have any issues playing audio through the EVM? Was the EVM and your prototype setup in the same configurations? 

    Regards,

    Robert Clifton

  • Hi Robert,

    Sorry for the late reply - I was expecting an e-mail telling me that there was a reply to my post, but maybe our server blocked it.

    Q1) We have noticed that sometime the chip with the unused channel runs hot (we have 3 chips per board). One of my colleague thinks that without the output inductors, those FETs will be hard switching vs. all the other channels which will be soft switching. That would cause a larger increase in dissipation on the output FETs so this may be causing the extra heat. What do you think? BTW, removing the BST caps, helps reducing the heat as this section is no longer switching BUT the \CLIP_OTW indicator is asserted - so not really an option!

    Q2) The 3.9V is on MY board. If this is correct, It would be great if you can confirm that this is the correct DC biasing. There was no issue with audio, on my board or the EVM. I'm just trying to understand why there is a difference. The EVM and proto setup are basically having the same configuration. 

    Stay safe!

    Louis

  • Hi Louis,

    1) I can't recommend removing the bootstrap capacitors from the device. Maybe putting the device in PBTL mode would help? If this was the TPA3255 then you could operate in 1xBTL mode, essentially disabling OUTC and OUTD. Unfortunately TPA3251 does not have that feature. 

    2) How strange. I suspect it might have something to do with the op-amp circuitry but I would have to run a "sanity" check. It would be a little difficult for me to check that right now for this week though. 

    Regards,

    Robert Clifton