• Resolved

CDCM7005-SP: HW Reset to SPI time

Part Number: CDCM7005-SP

What is the specification for the SPI interface after reset? When is the SPI interface operable after HW Reset.

  • I will attempt to determine this with the EVM in the lab tomorrow and let you know what I find.

  • In reply to Christian Yots:


    I confirmed with the CDCM7005-SP EVM that the SPI remains active even when the device is held in RESET mode. I determined this with the following experiment:

    1) Lock PLL with output buffer set to DIV1 and confirm spectrum.
    2) Using RESET jumper on EVM, set device to RESET mode (found that button on GUI is not active)
    3) While device is in RESET, program output buffer to divide by 2
    4) Remove RESET jumper and confirm that output tone moved from DIV1 tone to a DIV2 tone which indicates output buffer was programmed while device was in RESET mode.