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LMK00105: Using VDDO as Output Enable

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Replies: 8

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Part Number: LMK00105

Hello,

The LMK00105 features two independent banks of output clocks, but only one output enable pin.    Would it be possible to control the clock outputs by connecting independent load-switches to the corresponding VDDO?    

There's a statement on page 9 of the datasheet that sort of addresses this question, but the reasons behind why aren't exactly clear.

Don

  • Hello Don,

    My take is that using a load switch would qualify as disconnecting the Vddo pins which is not allowed by that note on page 9.

    I'll assign this to another engineer in case he has a better understanding. But this is my current understanding based on the datasheet.

    73,
    Timothy

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  • In reply to Timothy T:

    Thanks Timothy,

    Appreciate the timely response.    Looking forward the response from the other engineer as to why this won't work.

    Don

  • In reply to Donald Schelle90399:

    It seems the note "DO NOT DISCONNECT OR GROUND ANY OF THE Vddo PINS because the Vddo pins are internally connected within an output bank."need be clarified, especially for "within an output bank". Our AE would do it when he come back in next week.

    Regards,
    Shawn

    ____________________________________________________________________________________

    To design your own Clock Tree solution, visit WEBENCH Clock Architect ​​​​

    More information Clock and Timing System products: http://www.ti.com/clock-and-timing/overview.html

  • In reply to Shawn Han:

    Folks,

    Appreciate the responses. Looking forward to some clarification now that everyone is back from holidays.

    Don
  • In reply to Donald Schelle90399:

    Don,

    I will confirm if this is doable with the IC designer. Thanks for your patience.

    Alan

  • Don,

    VDDO only goes to the Output buffer stages for the corresponding output bank. So, yes, the VDDO for the given output bank could be used to effectively enable the output bank.

    Alan
  • In reply to Alan O:

    Thanks Alan,

    When VDDO is disconnected via a load switch, what is the state of the outputs?   High impedance?

    Don

  • In reply to Donald Schelle90399:

    The LVCMOS output supply goes to 0V, along with the gate voltages, etc.  So effectively the impedance at 0V will be very high.  If you were to curve trace the output in this condition though, you will see a diode starting to turn on once you start going above or below ground, so the high impedance is only right around when the output is at 0V.  If the output is pulled up with an external resistive termination in this mode, it will clamp at roughly 1V or so.

    Alan

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