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LMX2595: Phase Noise Profile Not as Expected

Prodigy 130 points

Replies: 3

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Part Number: LMX2595

We are testing the LMX2595 with various signal sources and we are not seeing the phase noise profile being measured match what the data sheet specifies. 

The data we measured along with the reference oscillator used are as follows:

1. 10MHz Sine Wave out of our ESA with phase noise and results:

2. 5MHz CMOS Clock with phase noise and results

While we were not expecting the phase noise performance itself to match the data sheet exactly we were expecting the same type of shape and general performance. If anyone is able to shed some light on what is going on and/or how to potentially solve the issue it would be greatly appreciated.

- Kyle Weidmann

  • As some added information we are using the EVM board configured to accept external reference clocks with the loop filter remaining the same. We were expecting something similar to the expected results in the data sheet for the EVM, especially as we are using two oscillators with higher specifications than the original oscillator on the board.

  • In reply to Kyle Weidmann:

    Kyle,

    In regards to using an external reference source the phase noise is critical.

    If you drive this with any signal generator, except the newest Rhode & Schwartz SMA100B signal generator, the phase noise you should at any offsets that are less than 100x the loop bandwidth should be absolutely terrible.  I saw some plots from signal generators with bad noise, so this meets expectations.

    Now you say that your input reference source has better than the one on the board.  So first of all, if you are claiming it is your signal generator (unless it's the SMA100B), I absolutely don't believe it.  Signal generators might spec noise at 10 MHz carrier instead of some other games, but be sure not to be deceived. 

    Also understand that the signal generator noise gets multiplied up.  So if you have 100 MHz input, at 14 GHz, the noise is 20*log(14GHz/100MHz)  = 43 dB higher.   Also, if you are using a 10 MHz XO, then it also gets multiplied up by even more.   Also, the PLL figure of merit and loop bandwidth will be different.  

    You can import the input reference noise into our PLLatinum Sim tool (ti.com/tool/PLLATINUMSIM-SW)

    For the XO on the board, it is pretty good at offsets > 1 KHz.  It's a little worse than the Wenzel 100 MHz oscillator we use for test, but very respectable compared to a lot of other oscillators I have seen.  

    OK, so lets now assume the following:

    1.  Thoroughly rule out all the possibilities for the input reference being bad as mentioned above.

    2.  Your input reference indeed has good phase noise.

    3.  Your input reference is 100 MHz

    4.  You are using the default mode with 100 MHz input and 200 MHz phase detector frequency.

    Assuming the above a true, then consider these things:

    1.  Ensure that the power is removed from our XO on the board as it causes crosstalk and spurs if allowed to free-run. 

    2.  Ensure that you have a good slew rate as a low slew rate could lead to phase noise degradation.  

    3.  Ensure that this is hooked up.  For instance, when you disconnect the XO, you have to flip a resistor to connect to the output if you use the OSCinP SMA to drive it.  Also, if there is some bad solder joint or issue, it could show up as phase noise degradation.

    Regards,
    Dean

  • In reply to Dean Banerjee:

    Kyle,

    I looked at the original plots and think it's the signal generator.

    Your input reference claims -131 dBc/Hz at 100 KHz offset for a 1 GHz carrier. This works out to about -112 dBc/Hz at 100 kHz for just this. So maybe you are thinking it is sufficient, but that's a bad assumption.

    In general, signal generators get better normalized noise at higher frequencies. There is a theoretical reason for this.

    So what I am saying is that since you are using this at 10 MHz, not 1 GHz, you can't use the 1 GHz specifications; they are way off.

    A good experiment with signal generators and PLL noise is to keep the phase detector frequency constant, but increase the input reference frequency.

    In other words, if you keep the same output frequency (9 GHz) and use a phase detector frequency of 100 MHz, you will find that if I take 1000 MHz from the signal generator and divide it by 10 to get 100 MHz phase detector, I will get better phase noise at the LMX2594 output than simply taking 100 MHz input straight to the phase detector.

    Regards,
    Dean

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