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LMK61E2: Abnormal measured phase noise on LMK61Exx

Prodigy 90 points

Replies: 5

Views: 248

Part Number: LMK61E2

Dear all,

We found the measured phase noise of LMK61E2 is quite much worse than the datasheet, though at a different frequency.

Could someone explain that if this is expected, i.e. LMK61Exx is optimised for 156.25MHz in integer-N mode and 161.1328125MHz in Fractional-N mode, rather than 125MHz?

Please find our measurement attached, the LMK61E2 is set to 125MHz and 125.000001MHz to force configuration tool going into the fractional-N mode.

The configuration RAW registers values generated with the TI tool are the following.

For fractional-N mode:

R0 0x0010
R1 0x010B
R2 0x0233
R8 0x08B0
R9 0x0901
R16 0x1000
R17 0x1180
R21 0x1501
R22 0x1600
R23 0x172A
R25 0x1900
R26 0x1A34
R27 0x1B20
R28 0x1C00
R29 0x1D01
R30 0x1E3F
R31 0x1FFF
R32 0x20FF
R33 0x2103
R34 0x2224
R35 0x2327
R36 0x2424
R37 0x2502
R38 0x2600
R39 0x2707
R47 0x2F00
R48 0x3000
R49 0x3110
R50 0x3200
R51 0x3300
R52 0x3400
R53 0x3500
R56 0x3800
R72 0x4802

For Integer-N mode:

R0 0x0010
R1 0x010B
R2 0x0233
R8 0x08B0
R9 0x0901
R16 0x1000
R17 0x1180
R21 0x1501
R22 0x1600
R23 0x1728
R25 0x1900
R26 0x1A32
R27 0x1B00
R28 0x1C00
R29 0x1D00
R30 0x1E00
R31 0x1F00
R32 0x2001
R33 0x210C
R34 0x2228
R35 0x2303
R36 0x2408
R37 0x2500
R38 0x2600
R39 0x2700
R47 0x2F00
R48 0x3000
R49 0x3110
R50 0x3200
R51 0x3300
R52 0x3400
R53 0x3500
R56 0x3800
R72 0x4802

We also got similar result on LMK61E07, which we actually prefer to use, but the tool and evaluation board doesn't seem avaliable.

Please advise, thanks.

Regards,

Wade

  • Hi Wade,

    The differences between datasheet measurement and your measurement:

    1, Power supply noise

    2, Instrument: TI used Keysight E5052A or E5052B

    3, Register settings

    4, Output termination: When measure one line signal in a differential pair, another line should be terminated with 50 Ohm.

    I did measurement on LMK61E2, the result is good. See details in below attachment. Configuration file .tcs can be loaded or saved in GUI "LMK61xx Oscillator Programming Tool" or GUI "TICS Pro".

    Regards,

    Shawn

    ----------------------test result-------------

    Output 125MHz LVPECL:

    Output 125.000001 MHz LVPECL: Some spurs caused by fractional PLL.

    LMK61E2_LVPECL_125MHz_125p000001MHz.zip

    ____________________________________________________________________________________

    To design your own Clock Tree solution, visit WEBENCH Clock Architect ​​​​

    More information Clock and Timing System products: http://www.ti.com/clock-and-timing/overview.html

  • In reply to Shawn Han:

    Dear Shawn Han,

    Thanks for the reply and tests you have done.

    We have been looking into this detail and got the LMK61E2 sort of working as the datasheet says.

    It is noticed by turning on and off the reference doubler, the measured in-band phase noises are different by about 6 dB.

    Though it is more than 3dB which suggested by the datasheet, it is fine for us (can be measurement error, instrument calibration etc,).

    BTW, the instrument we are using is R&S FSWP8.

    However, the results for LMK61E07 are much worse.

    They do not meet the claim about the 3dB and 6dB given by the reference div-by-4 and doubler respectively.

    They do seem the same to the datasheet plots neither, and the reason is not clear to us.

    Please find the attached plot.

    We do need the div/4 feature as the resolution is important to us, therefore LMK61E07 is preferred.

    Please could you advise, thanks.

  • In reply to Weida Zhang:

    Green curve loop bandwidth had been reduced too much. Try to make it wider.

    ____________________________________________________________________________________

    To design your own Clock Tree solution, visit WEBENCH Clock Architect ​​​​

    More information Clock and Timing System products: http://www.ti.com/clock-and-timing/overview.html

  • In reply to Shawn Han:

    Thanks Shawn.

    Have you got an optimised filter setting which we can try on LMK61E07?

    We found that the filter works on LMK61E2 usually sends LMK61E07 out of locked.

    The LMK61xx Oscillator Programming Tool doesn't seem recognising LMK61E07 and mistakes it as LMK61E2, which avoids us from setting the Div4.

    On the other hand, we don't really care what happens on the sideband >10kHz, which we believe the loop filter is responsible for.

    Will it help in reducing the phase noise between the sideband of 1kHz and 10kHz by making the loop bandwidth wider?

    Regards,

    Weida

  • In reply to Weida Zhang:

    To increase R2 can make loop bandwidth wider, which could help noise around 10 kHz ~100 kHz.
    But the root cause is from fractional-N PLL mode, the fractional and sub-fractional spurs are different when you enabled and disabled Div4.
    PLL dither function R33[3:2] would make fractional spurs distributing in phase noise curve, looks like noise worse much, but it is smooth.
    Try to change loop bandwidth, dither function. You have to trade off between frequency resolution, noise , spurs etc.

    Datasheet "9 Application and Implementation" show a design example and spur considerations. It maybe can give some ideas.

    ____________________________________________________________________________________

    To design your own Clock Tree solution, visit WEBENCH Clock Architect ​​​​

    More information Clock and Timing System products: http://www.ti.com/clock-and-timing/overview.html

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