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LMX2595: PLL not locking with side spurs

Prodigy 30 points

Replies: 12

Views: 208

Part Number: LMX2595

The PLL output does not look as we expect.

The PLL is reporting that it is locked We are a using a 40 MHz crystal oscillator reference signal in the circuit below. The register values we are using were generated by the PLL API. 

Shouldn't the signal be cleaner? Any feedback on the filter topology we are using would be helpful.

  • In reply to Noel Fung:

    Noel,

    Thank you that was our problem! I don't feel too bad, we have two people working this in two locations, 2 EVMs and we both made the same mistake. 

    One more question, our development board has a 40 MHz OSC, can I use a 40 MHz external source rather than the REF PRO?

    Thanks!

    Hilary

  • In reply to HILARY MEEKEN:

    Hi Hilary,

    Yes, sure.

    Make sure your clock source is able to drive 50Ω load coz there is a 50Ω shunt on OSCinP.