I need an ADC clock at multiple of 85M; 340, 425 and 510MHz, jitter < 120femto-secs over 1k to 10MHz.. Whichever of the 3 freq selected, I want a fixed 85M - Div by 4,5 or 6. I have a 80M VCXO. Is there a PLL IC that can accept 80M Ref, generate 340, 425 and 510M , with a fixed 85M out? - eg programmable divider =4, 5 or 6?