Hello,
We want to interface the LMK01801 clock buffer to a DC-coupled clock receiver with around 1V input common-mode voltage (self-biased input with integrated 100 ohm differential termination). LVDS can not be applied in this case since it gives us insufficient swing (min. 500mVpp differential swing required). LCPECL output format comes into play which seems to be a good fit to maintain the output to input common-mode voltage requirements. The emitter resistor for both LVPECL and LCPECL should be in range of 120 to 240 ohm. But how we can calculate the optimum resistor value to get roughly the same common-mode voltage at both sides, driver output and receiver input?
Who could help out here?
Best regards,
Joerg