LMK04610: LMK04610 Design Verification
Part Number: LMK04610
This is similar to the issue raised earlier. The loop bandwidth for PLL2 is showing to be > 10MHz for a PFD of 10MHz. But this is not observed at higher PFD frequencies.
We need to generate 105MHz and 10.5MHz from LMK04616. for which the the selected VCO frequency is 5880MHz. This synthesis is not possible with higher PFD frequencies. Kindly clarify if the observed loop bandwidth is a tool issue or configuration issue.
The TICSPro file is attached for reference.
Hi Ayesha, I have assigned a responsible engineer to your post. He will get back to you soon. Kind regards, Lane
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