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LMX2572: Multiplier input frequency range

Muharrem Kara
Prodigy 110 points
Part Number: LMX2572

Hello,

in data sheet of LMX2572, multiplier input frequency is maximum 40 MHz, if  MULT ≥ 3. 

But, we want to multiply 48 MHz by 3 in order to get 144 MHz reference for better spur performance.

what can be the posssible issues of multiplying 48 MHz by 3?

thank you,

Muharrem Kara

  • 0
    TI__Guru* 81340 points
    Hi Muharrem,

    You can use the Pre-R divider to make the input frequency to the MULT to 24MHz. And then use MULT=6 to boost the fpd to 144MHz. Don't forget to set MULT_HI=1 because the output of MULT is greater than 100MHz.
  • 0 in reply to Noel Fung
    Prodigy 110 points

    Hi Noel,

    Many thanks for your reply.

    we divided 48 MHz by 2, then multiplied by 6 to boost the fpd to 144 MHz.. 

    However, it caused a 2 dB degradation in phase noise at 470 MHz output and 100 KHz offset, as expected!

    I think, we have to find an another solution.

    thanks,

    kara

  • 0 in reply to Muharrem Kara
    TI__Mastermind 18070 points
    Hi Kara,

    Noel's suggestion is the only way to make the OSCin multiplied by 3, to my knowledge. How about just using the doubler instead? Did you compare the PFD spur level when multiplied by 2 and 3?

    Regards,
    Hao
  • 0 in reply to Hao Z
    Prodigy 110 points

    Hi Hao,

    many thanks for your reply.

    Yes, we compared the PFD spur level when 48 MHz multiplied by 2 and 3.

    We have measured a better spur performance when 48 MHz multiplied by 3, using multiplier.

    On the other hand, when we try to optimize the phase noise and spur performance, we are usually measuring a better spur performans with higher levels of PFD_delay than TICS pro recommend, as increasing from 2 to 3, or 3 to 4.

    is it right to increase PFD_delay from 2 to 3, or, from 3 to 4, and etc.? is there any constraint for PFD_delay?

    Thanks,

    kara

  • 0 in reply to Muharrem Kara
    TI__Mastermind 18070 points
    Hi Kara,

    There's not a strict rule for PFD_DLY because the static delay is difficult to characterize. The values beyond the recommendation table are not guaranteed, but it should be okay if the delay is not too long. You can play with this register a little bit but we suggest to back off 1 cycle if anything is wrong.

    You can also reduce the loop bandwidth to suppress spurs.

    Regards,
    Hao