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LMK03318: Effect of input jitter RMS spec on output jitter RSM spec

Part Number: LMK03318

Hello.

We use webench simulation to identify the jitter RMS spec of LMK03318.

My customer's input method is LVPECL, and the output method is CML.

The output jitter RMS was calculated as 118.1 fs when the phase noise range was set from 12kHz to 20MHz and it was within the specification range of the customer.

At this time, I think that the jitter value of the input LVPECL can be up to max 510 fs. Does not this affect the output jitter RMS value?

My customer wants the output jitter RMS value to be within 150 fs.

Please check it.

  • Hi Anthony,

    You can provide the phase noise of the input clock to Webench, then you will get a more realistic simulation result.
    In your webench design, click "Enter Custom Phase Noise for Reference or VCO/VCXO"
    Follow the pop-up instruction to complete entering the phase noise of the reference clock.
  • Thank you for the reply.

    But my customers only want to see the following:

    Is there a problem that the output jitter is less than 150 fs even if the input jitter is about 510 fs?

    We do not have the additional phase noise information needed for additional webench simulations.What if the input is noise with a jitter RMS of about 510 fs (femto second) for the time domain, is the output through lmk03318 attenuating it to about 150 fs?  I just want to know this.

    Please check it.

    Thank you

    Best regards.

    From Anthony

  • Hi Anthony,

    The answer is not so straight forward.
    From phase noise, we can calculate the jitter. However, from jitter, we cannot reconstruct the phase noise distribution.
    For a given jitter, there are many possible phase noise distributions. For example, for a certain clock, the close-in phase noise is bad but the far-out is good. It is possible that the integrated jitter could be same as another clock, which on the contrary, both close-in and far-out phase noises are fair. If you use these clocks as the reference to a PLL, the output phase noise (and jitter) would be different.
    Without knowing the phase noise distribution of the input clock, it is not possible to tell what does the output clock looks like.

    LMK03318 is a clock generator, with a very good phase noise reference clock, it can generate very low noise output clocks.
    Although we can use it as a jitter cleaner, but we must know the phase noise of the reference clock in order to determine its jitter cleaning capability.

    To play safe, we can use dual loop jitter cleaner like LMK048xx. The first loop of these devices is used to perform jitter cleaning. With the help of an external VCXO, the jitter cleaning capability is very strong. I am pretty sure that these devices can clean a 500fs input clock to a 150fs output clock.
  • Hi

    Thank you for your reply

    I share phase noise data for the input clock you requested.

    Is it correct to put the phase noise value in the Vco value in the simulation?

    Please check it.

    Thank you

    Best regards

    From Anthony

  • Hi Anthony,

    here.

  • Hi Noel! 

    Thank you for your kind response.
    There is one more question. When will the VCO function be used?
    In the case of the Jitter Noise that my customer has mentioned, it is not the noise of the reference clock but the jitter noise of the input clock as shown below.
    Is it correct to simulate this by setting "REF" as you said?Is it not necessary to simulate by setting "VCO"?
    Pleas check it.

    Thank you.

    Best regards.

    From anthony

  • Hi Anthony,

    You are using the internal VCO of the LMK device, webench already has the VCO characteristics so you don't need to tell webench.
    The phase noise plot you got describes the characteristic of the input clock (ref clock), you need to tell webench about this in order to get a more accurate simulation.

    Suggest you spend a few minutes to read my blog to refresh some PLL phase noise basic.
    e2e.ti.com/.../timing-is-everything-understanding-pll-loop-filter-response