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Part Number: LMK03328
My customer is using LMK03328 for their design and run the simulation by our webench as below figure.
Whether they should setting their VCO1 at 4884MHz ?
They have calculated the loop filter parameter by below website and the result is quite different with us.
So they would like to know how to design it?
Thank for your kindly help.
I notice the input settings for the web loop filter calculation tool are different from the optimized configuration by the Clock Design Architect.
If most significant note is the loop bandwidth and the phase margin. This is resulting in a significantly different loop filter. I expect adjusting these to be the same would result in a similar loop filter result.
Do you really want 7.425 MHz LBW? I expect it cannot be achieved. You may find this presentation of interest on choosing loop bandwidths: e2e.ti.com/.../664163.aspx.
To design your own Clock Tree solution, visit WEBENCH Clock ArchitectMore information Clock and Timing System products: http://www.ti.com/clock-and-timing/overview.html
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