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LMK03328: power up, no output sometimes

Laurie Fung
Prodigy 120 points
Part Number: LMK03328

To ensure the 10MHz OCXO output stable before the LMK03328 PLLs lock, we add a 10uF cap to the PDN pin.

Most of the time, it power up ok with output clock but not always like that.

We are seeing some of this LMK03328 power up with no output clock at all. By power off then on, it will output clock.

We need to understand why and how this happen? How to fix this issue?

Thanks,

Laurie

  • 0
    TI__Mastermind 18070 points

    Hello Laurie,

    It's less likely to cause trouble if the PDN pin ramps up slowly. It's more likely that the startup time of the XO is so slow that even with a 10uF load, the PDN pin still reaches 1.2V before the XO stabilizes. Please measure the timing relationship between the point where PDN reaches 1.2V and the XO starts to toggle between GND and rail. 

    Also, increase the capacitance and see if it helps or aggravates the problem. (It should help but if the problem gets worse then lets further discuss it.)

    Regards,
    Hao

  • 0 in reply to Hao Z
    Prodigy 120 points

    I did several measurements and capture the good and bad results (see the attachments).

    In both cases, the 10MHz OCXO output was stable for around 1.5seconds before the PDN reached 1.2V.

    In the bad case, no clock output after the PDN reached 1.2V. What cause that to happen and how to fix it?

    Thanks,

    Laurie

    Pwr_On_output_OK.pdfPwr_On_No_output.pdf

  • 0 in reply to Laurie Fung
    TI__Mastermind 18070 points

    Hello Laurie,

    I'm still looking into this. The pullup resistor at PDN pin is 200kOhm. With a 10uF cap the time constant is 2s. Meaning that it takes 2s to ramp up to 63% of VDDO_01. I wonder if that's too long.

    I'll do some measurement and see what happens if the PDN pin ramps up too slowly and will get back to you later.

    Regards,
    Hao

  • 0 in reply to Hao Z
    TI__Mastermind 18070 points

    In the meantime, can you check the timing relationship between ramping of PDN pin and that of VDDO_01 pin as well as other VDD pins? The PDN pin should reach 1.2V of VDDO_01 after core VDD pins reach 2.72V and VDDO_01 pin reaches 1.7V. Make sure that this condition is met. Also make sure that VDD ramp time is within 100ms as required by datasheet.

    Regards,
    Hao

  • 0 in reply to Hao Z
    Prodigy 120 points

    VDD does reach 2.72V and VDDO_01 does reach reach 1.7V way before PDN PDN reaches 1.2V. Both VDD and VDDO_01 ramp up much less than 100mS (ramp up around 2 mS).

    Please review these attachments. We need to fix this no output issues.

    Thanks,

    Laurie

  • 0 in reply to Laurie Fung
    TI__Mastermind 18070 points

    Laurie,

    2s time constant may be too long. What is the startup time of the OCXO? Can you add a 4.7kOhm pullup in order to reduce the time constant to 47ms?

    Regards,
    Hao