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Part Number: LMK04828
Now we use XILINX FPGA to config the LMK04828, with the oscilloscope we know the CSN and SCK is ok, but the SDIO voltage is too low (the high level is just 200 mV). I check the power supply and it's ok(3.3 V),now I don't konw what is the reason and how to solve the problem.
Below is the wave of CSN and SDIO in oscilloscope.
Thanks for help!
Is the SDIO pin configured as open-drain on either the FPGA or the LMK04828? I have seen situations that look similar to this when an open-drain I/O does not have a pull-up resistor connected, or when a push-pull output is driving an active open-drain output. By default, when SDIO is used for readback, it is configured as open-drain.
Can you share the schematic for the SPI connection? If you have managed to program the LMK04828 before encountering this problem, can you share the register programming, particularly for register 0x149 which contains the SDIO_RDBK_TYPE bit?
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In reply to Derek Payne:
Hello Derek Payne,
I have managed to program the LMK04828,but after that I have powered down the board so I think the programmed registers would become the default value.
In fact, after power on, the first time I try to config the chip,the wave of SDIO is like the image above.So I think the value of register 0x149 is the default value.
WE have a 4.7k ohm pull-up resister on CSN and SDIO pin, and below is the schematic of our board.
Yesterday we found the problem.
It is a hardware design problem, the SDIO pin is connected GND on a connector. When we dismantled the connector, the SDIO pin was OK.
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