Hi TI,
I am designing a board that uses the TI LMK05318RGZT part. In the data sheet of this part, it is mentioned that to feed the XO with single-ended LVCMOS clock voltage up to 2.5 V can be applied to
the P input with the N input pulled down to ground.
But in the Typical application Reference schematics in data sheet Page No 69, figure 64 it is mentioned for 'Y1' with the part 8W48070002 feeding the XO input. This part is supplied with 3.3V & the output voltage levels
of this Oscillator are not meeting the Input voltage requirement of IC LMK05318. Maximum of 2.6 VPP can be applied to the input of the XO_P input. But this oscillator Y1 feeds more 90% output voltage level of supply voltage(3.3V here). so, it comes 2.97V exceeding the 2.6V.
Is not that a issue?
Also, in the reference application schematics, the filter combination of 100 ohm series resistor + 0.1uF cap + 49.9 Ohm resistor + again 0.1uF capacitor is present at the output of Y1. This makes me confusing as why this much double coupling & filtering & termination.
So, attached herewith is my schematics design using LMK05318. and used different oscillator than the one present in Reference design because of RoHS3 compliance info missing for that part.
Please confirm my oscillator part selection & the filter design used at the output of the oscillator in y design.
Also, review the schematics & share your comments. What is the use case of HW_SW_Control mode for EEPROM on chip selection against on chip ROM selection?.
