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LMK04906: Circuit for driving OSCin with single ended VCXO

Part Number: LMK04906

Looking at the requirements for the OSCin pin of the LMK04906, the max single ended voltage is 2.5V.  Is there a recommended circuit for driving that input with a standard 3.3V CMOS VCXO? 

Looking at the evaluation board, there are two series 0.1uF capacitors that drive the OSCin port.  It isn't clear why this would meet the max voltage specification of the LMK when driven by a 3.3V CMOS device.  

Also, in the LMK04906 datasheet in figure 39, there is an Rterm resistor shown but no discussion as to what it might be or the input impedance of the OSCin port.

Any guidance would be appreciated.  

  • 1, OSCin should be AC coupled, similar as "Figure 24. CLKinX/X* Single-Ended Termination" in LMK04906 datasheet.
    When a 3.3V LVCMOS VCXO drive a 50 Ohm load, the logic high voltage would be dropped, because 50 Ohm load is too heavy for a LVCMOS driver.

    2, So we can insert a serial 50 Ohm at VCXO driver side, to make a 50 Ohm and 50 Ohm divider. VCXO also drive 50+50=100 Ohm load. As expected, Amplitude also would be divided to a half.
    Notice if VCXO like to keep 3.3V logic high, it need output current capability with 3.3V/ 100 Ohm =33 mA. It still is higher for normal usage.
    So we still can see VCXO can not output 3.3V voltage, but it can work.

    3, To make VCXO run in a comfortable condition, we can increase two 50 Ohm to 100 Ohm or more, the resister divider to 100 Ohm + 100 Ohm, keep the trace short from VCXO to LMK04906 OSCin.

    For LMK04906 OCSin pin or CLKin pin, they are are high impedance input.
  • Thank you shawn for the reply.

    From your response it seems that you aren't particularly worried about noise being generated by resistors hanging off the clock input.  And the VCXO should be sufficiently low frequency to avoid impedance matching issues if traces are kept short.  

  • Hi Mark,

    You are correct. The thermal noise with several hundreds Ohm resistors is not a critical spec. in this application. And normally LVCMOS driver would limit frequency under 250 MHz.
    Above method with resistors divider had been used in many telecom applications for a long time.

    regards,
    Shawn