Securaplane (Meggit) entered the following question on the TI suppot ste and has not received and answer. Please help. I have requested a schematic and layout. Let me know if you need any additional information.
****Excessive Jitter Using National's LMH1983 Video Clock Generator. Only using the differential Clkout1+/- output but currently no I2C access so all CLKouts enabled. Datasheet states: TIE Deterministic Jitter = 250 fs and TIE random jitter = 2.7ps. Using Tektronix MSO72004C oscope (20GHz-100GS/s) measured: TIE Deterministic Jitter = 692 fs and TIE random jitter = 203ps(see attached jpeg image RefClk_27MHZ_r1.jpg). The NO_LOCK output is asserted. PLL1 Mode is in GENLOCK and I have Hsync, Vsync and Field present. It appears that there's a slight time shift in the output clock around 400ps (see attached jpeg image RefCLK_27MHZ_r2.jpg). Currently setting up the I2C interface so I can shut down the other three VCOs and mask the NO_LOCK signals from PLL2-4. Could you please provide any debug tips for this problem? The final 3G HD-SDI signall has twice the amount of jitter thats allowed for SMPTE 424 specification****
Measuring sub picosecond jitter is tricky, so I am less concerned about the difference between our measurements on deterministic jitter and your customers than I am concerned about the random jitter - 203ps is a huge amount of jitter for the LMH1983 when it is operating properly.
Things that I would look at include:
I assume that the jitter was being measured at the output of the chip, not after a serializer - the customer refers to a SMPTE 424 signal, what is the serializer being used to generate the SMPTE 424 signal from the clock that we are generating?
Is the output signal routing between the output of the chip and the scope probe clean and properly terminated? If there are reflections on the output trace, noise being coupled in or other issues, then this might be the source of the jitter. - I didn't get the scope shots that he references, so I don't know if there is more information there. Please feel free to forward the images to my ti.com mailbox.
Another thing to look at is the reference that he is using for the part - if he removes the reference, it will make the part go into free-run mode. If the jitter changes appreciably, then that would be an indication that we should be looking at the reference inputs more closely rather than the outputs.
Has the customer band limited the jitter measurement on his scope? - any jitter on the 27MHz clock at frequncies below ~1MHz will pass directly through to the 148.5 and 148.35 MHz clocks. - Knowing what the frequency spectrum of his jitter is will help to determine it's source.
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