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Clocks & Timers
Clocks & Timers Forum
LMX2541 - R2pLF and SCLK
Hello, i'm using lmx2541sq2060e. I will use in full chip mode. The resistor R2pLF, according to the figure on page 50. What is the value?(in the evaluation board operating instructions it says open, i do not understand the meaning) Can it be 1K?
I will use a microcontroler to configure the lmx2541, the CLK is 100 MHz. Does this frequency works?
Sorry for the inconvenient.
Resistor R2pLF is OPEN, meaning it is not populated on the LMX2541 evaluation board. This resistor can be installed if you want to test/evaluate the Fastlock feature, which can be used to reduce PLL lock time. Consult Section 1.10 in the datasheet for more info on how to select a proper value for R2pLF and using the Fastlock feature.
100 MHz CLK input for the MICROWIRE interface is too fast and violates the MICROWIRE timing specs. The Minimum clock pulse widths (low time and high time) of 25 ns suggests that the Maximum CLK input frequency is 20 MHz (1 / 50 ns). Is it possible to divide your 100 MHz clock by a factor of at least 5x to meet the MICROWIRE timing specs?
Thanks for the explanations, really helpful.
Now i understand R2pLF. I will use 470 ohm, so K=2 (R2_LF=470 ohm, FL_CPG=32, CPG=8).
I can divide the 100 MHz in 20 MHz or less, no problem.
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