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CDCE72010 LVCMOS driving capability
I want to use the CDCE72010 Evaluation Board to generate clocks for three TI's ADC Evaluation Boards (2 ADS5521EVM and 1 ADS5424EVM), from a 10MHz sinusoidal laboratory source. I want to use three single ended LVCMOS outputs from CDCE72010.
Is the CDCE72010 Evaluation Board capable of drive correctly a 50ohms load from each one of its LVCMOS outputs?
Thanks in advance.
The LVCMOS outputs for the CDCE72010 are meant to drive a high-impedance load so you would not see the correct amplitude when using a 50-ohm load. Also in this configuration the performance is not guaranteed as it would be operating outside of the IOH/IOL spec of 100uA.
Thanks for the answer.
Do you have any recommendation for our purpose? Besides the use of a Laboratory Signal Generator?
Is there any Ti's Evaluation Board that could do the job without troubles??
When the LVCMOS output of the CDCE72010 is connected to a 50-ohm termination, the amplitude is reduced by half to around 1.5V (pk-pk). The ADC EVM expects a 1V RMS sine wave centered at 0V from the signal generator. I think that removing the 50-ohm resistor on the EVM (R4) should provide the correct swing (3V pk-pk = about 1.06V RMS).
Thanks! It seems an easy solution.
One more question. This way the LVCMOS driver output is well terminated?? Otherwise reflections may occur and the performance could be affected, right?
Furthermore, the characteristic impedance of the cables used to connect the two boards is 50ohms, this fact can't lead to reflections also??
Thank you very much for the attention.
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